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-rw-r--r--src/lj_asm_mips.h15
-rw-r--r--src/lj_target_mips.h7
2 files changed, 10 insertions, 12 deletions
diff --git a/src/lj_asm_mips.h b/src/lj_asm_mips.h
index d663aa0f..dd821c70 100644
--- a/src/lj_asm_mips.h
+++ b/src/lj_asm_mips.h
@@ -453,16 +453,13 @@ static void asm_conv(ASMState *as, IRIns *ir)
453 /* y = (x ^ 0x8000000) + 2147483648.0 */ 453 /* y = (x ^ 0x8000000) + 2147483648.0 */
454 Reg left = ra_alloc1(as, lref, RSET_GPR); 454 Reg left = ra_alloc1(as, lref, RSET_GPR);
455 Reg tmp = ra_scratch(as, rset_exclude(RSET_FPR, dest)); 455 Reg tmp = ra_scratch(as, rset_exclude(RSET_FPR, dest));
456 emit_fgh(as, irt_isfloat(ir->t) ? MIPSI_ADD_S : MIPSI_ADD_D,
457 dest, dest, tmp);
458 emit_fg(as, irt_isfloat(ir->t) ? MIPSI_CVT_S_W : MIPSI_CVT_D_W,
459 dest, dest);
460 if (irt_isfloat(ir->t)) 456 if (irt_isfloat(ir->t))
461 emit_lsptr(as, MIPSI_LWC1, (tmp & 31), 457 emit_fg(as, MIPSI_CVT_S_D, dest, dest);
462 (void *)&as->J->k32[LJ_K32_2P31], RSET_GPR); 458 /* Must perform arithmetic with doubles to keep the precision. */
463 else 459 emit_fgh(as, MIPSI_ADD_D, dest, dest, tmp);
464 emit_lsptr(as, MIPSI_LDC1, (tmp & 31), 460 emit_fg(as, MIPSI_CVT_D_W, dest, dest);
465 (void *)&as->J->k64[LJ_K64_2P31], RSET_GPR); 461 emit_lsptr(as, MIPSI_LDC1, (tmp & 31),
462 (void *)&as->J->k64[LJ_K64_2P31], RSET_GPR);
466 emit_tg(as, MIPSI_MTC1, RID_TMP, dest); 463 emit_tg(as, MIPSI_MTC1, RID_TMP, dest);
467 emit_dst(as, MIPSI_XOR, RID_TMP, RID_TMP, left); 464 emit_dst(as, MIPSI_XOR, RID_TMP, RID_TMP, left);
468 emit_ti(as, MIPSI_LUI, RID_TMP, 0x8000); 465 emit_ti(as, MIPSI_LUI, RID_TMP, 0x8000);
diff --git a/src/lj_target_mips.h b/src/lj_target_mips.h
index 308dd7ce..1b061943 100644
--- a/src/lj_target_mips.h
+++ b/src/lj_target_mips.h
@@ -32,6 +32,7 @@ enum {
32 RID_MAX, 32 RID_MAX,
33 RID_ZERO = RID_R0, 33 RID_ZERO = RID_R0,
34 RID_TMP = RID_RA, 34 RID_TMP = RID_RA,
35 RID_GP = RID_R28,
35 36
36 /* Calling conventions. */ 37 /* Calling conventions. */
37 RID_RET = RID_R2, 38 RID_RET = RID_R2,
@@ -74,10 +75,10 @@ enum {
74 75
75/* -- Register sets ------------------------------------------------------- */ 76/* -- Register sets ------------------------------------------------------- */
76 77
77/* Make use of all registers, except ZERO, TMP, SP, SYS1, SYS2 and JGL. */ 78/* Make use of all registers, except ZERO, TMP, SP, SYS1, SYS2, JGL and GP. */
78#define RSET_FIXED \ 79#define RSET_FIXED \
79 (RID2RSET(RID_ZERO)|RID2RSET(RID_TMP)|RID2RSET(RID_SP)|\ 80 (RID2RSET(RID_ZERO)|RID2RSET(RID_TMP)|RID2RSET(RID_SP)|\
80 RID2RSET(RID_SYS1)|RID2RSET(RID_SYS2)|RID2RSET(RID_JGL)) 81 RID2RSET(RID_SYS1)|RID2RSET(RID_SYS2)|RID2RSET(RID_JGL)|RID2RSET(RID_GP))
81#define RSET_GPR (RSET_RANGE(RID_MIN_GPR, RID_MAX_GPR) - RSET_FIXED) 82#define RSET_GPR (RSET_RANGE(RID_MIN_GPR, RID_MAX_GPR) - RSET_FIXED)
82#if LJ_SOFTFP 83#if LJ_SOFTFP
83#define RSET_FPR 0 84#define RSET_FPR 0
@@ -97,7 +98,7 @@ enum {
97 98
98#define RSET_SCRATCH_GPR \ 99#define RSET_SCRATCH_GPR \
99 (RSET_RANGE(RID_R1, RID_R15+1)|\ 100 (RSET_RANGE(RID_R1, RID_R15+1)|\
100 RID2RSET(RID_R24)|RID2RSET(RID_R25)|RID2RSET(RID_R28)) 101 RID2RSET(RID_R24)|RID2RSET(RID_R25))
101#if LJ_SOFTFP 102#if LJ_SOFTFP
102#define RSET_SCRATCH_FPR 0 103#define RSET_SCRATCH_FPR 0
103#else 104#else