diff options
Diffstat (limited to 'src/lj_asm.c')
-rw-r--r-- | src/lj_asm.c | 46 |
1 files changed, 2 insertions, 44 deletions
diff --git a/src/lj_asm.c b/src/lj_asm.c index 9009a7d5..b9ada175 100644 --- a/src/lj_asm.c +++ b/src/lj_asm.c | |||
@@ -1594,15 +1594,6 @@ static void asm_retf(ASMState *as, IRIns *ir) | |||
1594 | 1594 | ||
1595 | /* -- Type conversions ---------------------------------------------------- */ | 1595 | /* -- Type conversions ---------------------------------------------------- */ |
1596 | 1596 | ||
1597 | static void asm_tonum(ASMState *as, IRIns *ir) | ||
1598 | { | ||
1599 | Reg dest = ra_dest(as, ir, RSET_FPR); | ||
1600 | Reg left = asm_fuseload(as, ir->op1, RSET_GPR); | ||
1601 | emit_mrm(as, XO_CVTSI2SD, dest, left); | ||
1602 | if (!(as->flags & JIT_F_SPLIT_XMM)) | ||
1603 | emit_rr(as, XO_XORPS, dest, dest); /* Avoid partial register stall. */ | ||
1604 | } | ||
1605 | |||
1606 | static void asm_tointg(ASMState *as, IRIns *ir, Reg left) | 1597 | static void asm_tointg(ASMState *as, IRIns *ir, Reg left) |
1607 | { | 1598 | { |
1608 | Reg tmp = ra_scratch(as, rset_exclude(RSET_FPR, left)); | 1599 | Reg tmp = ra_scratch(as, rset_exclude(RSET_FPR, left)); |
@@ -1617,13 +1608,6 @@ static void asm_tointg(ASMState *as, IRIns *ir, Reg left) | |||
1617 | /* Can't fuse since left is needed twice. */ | 1608 | /* Can't fuse since left is needed twice. */ |
1618 | } | 1609 | } |
1619 | 1610 | ||
1620 | static void asm_toint(ASMState *as, IRIns *ir) | ||
1621 | { | ||
1622 | Reg dest = ra_dest(as, ir, RSET_GPR); | ||
1623 | Reg left = asm_fuseload(as, ir->op1, RSET_FPR); | ||
1624 | emit_mrm(as, XO_CVTSD2SI, dest, left); | ||
1625 | } | ||
1626 | |||
1627 | static void asm_tobit(ASMState *as, IRIns *ir) | 1611 | static void asm_tobit(ASMState *as, IRIns *ir) |
1628 | { | 1612 | { |
1629 | Reg dest = ra_dest(as, ir, RSET_GPR); | 1613 | Reg dest = ra_dest(as, ir, RSET_GPR); |
@@ -1636,24 +1620,6 @@ static void asm_tobit(ASMState *as, IRIns *ir) | |||
1636 | ra_left(as, tmp, ir->op1); | 1620 | ra_left(as, tmp, ir->op1); |
1637 | } | 1621 | } |
1638 | 1622 | ||
1639 | static void asm_toi64(ASMState *as, IRIns *ir) | ||
1640 | { | ||
1641 | Reg dest = ra_dest(as, ir, RSET_GPR); | ||
1642 | IRRef lref = ir->op1; | ||
1643 | lua_assert(LJ_64); /* NYI: 32 bit register pairs. */ | ||
1644 | if (ir->op2 == IRTOINT_TRUNCI64) { | ||
1645 | Reg left = asm_fuseload(as, lref, RSET_FPR); | ||
1646 | emit_mrm(as, XO_CVTTSD2SI, dest|REX_64, left); | ||
1647 | } else if (ir->op2 == IRTOINT_ZEXT64) { | ||
1648 | /* Nothing to do. This assumes 32 bit regs are already zero-extended. */ | ||
1649 | ra_left(as, dest, lref); /* But may need to move regs. */ | ||
1650 | } else { | ||
1651 | Reg left = asm_fuseload(as, lref, RSET_GPR); | ||
1652 | emit_mrm(as, XO_MOVSXd, dest|REX_64, left); | ||
1653 | lua_assert(ir->op2 == IRTOINT_SEXT64); | ||
1654 | } | ||
1655 | } | ||
1656 | |||
1657 | static void asm_conv(ASMState *as, IRIns *ir) | 1623 | static void asm_conv(ASMState *as, IRIns *ir) |
1658 | { | 1624 | { |
1659 | IRType st = (IRType)(ir->op2 & IRCONV_SRCMASK); | 1625 | IRType st = (IRType)(ir->op2 & IRCONV_SRCMASK); |
@@ -2499,7 +2465,7 @@ static void asm_x87load(ASMState *as, IRRef ref) | |||
2499 | emit_x87op(as, XI_FLD1); | 2465 | emit_x87op(as, XI_FLD1); |
2500 | else | 2466 | else |
2501 | emit_rma(as, XO_FLDq, XOg_FLDq, tv); | 2467 | emit_rma(as, XO_FLDq, XOg_FLDq, tv); |
2502 | } else if (ir->o == IR_TONUM && !ra_used(ir) && | 2468 | } else if (ir->o == IR_CONV && ir->op2 == IRCONV_NUM_INT && !ra_used(ir) && |
2503 | !irref_isk(ir->op1) && mayfuse(as, ir->op1)) { | 2469 | !irref_isk(ir->op1) && mayfuse(as, ir->op1)) { |
2504 | IRIns *iri = IR(ir->op1); | 2470 | IRIns *iri = IR(ir->op1); |
2505 | emit_rmro(as, XO_FILDd, XOg_FILDd, RID_ESP, ra_spill(as, iri)); | 2471 | emit_rmro(as, XO_FILDd, XOg_FILDd, RID_ESP, ra_spill(as, iri)); |
@@ -3753,15 +3719,7 @@ static void asm_ir(ASMState *as, IRIns *ir) | |||
3753 | case IR_OBAR: asm_obar(as, ir); break; | 3719 | case IR_OBAR: asm_obar(as, ir); break; |
3754 | 3720 | ||
3755 | /* Type conversions. */ | 3721 | /* Type conversions. */ |
3756 | case IR_TONUM: asm_tonum(as, ir); break; | ||
3757 | case IR_TOINT: | ||
3758 | if (irt_isguard(ir->t)) | ||
3759 | asm_tointg(as, ir, ra_alloc1(as, ir->op1, RSET_FPR)); | ||
3760 | else | ||
3761 | asm_toint(as, ir); break; | ||
3762 | break; | ||
3763 | case IR_TOBIT: asm_tobit(as, ir); break; | 3722 | case IR_TOBIT: asm_tobit(as, ir); break; |
3764 | case IR_TOI64: asm_toi64(as, ir); break; | ||
3765 | case IR_CONV: asm_conv(as, ir); break; | 3723 | case IR_CONV: asm_conv(as, ir); break; |
3766 | case IR_TOSTR: asm_tostr(as, ir); break; | 3724 | case IR_TOSTR: asm_tostr(as, ir); break; |
3767 | case IR_STRTO: asm_strto(as, ir); break; | 3725 | case IR_STRTO: asm_strto(as, ir); break; |
@@ -3905,7 +3863,7 @@ static void asm_setup_regsp(ASMState *as, GCtrace *T) | |||
3905 | } | 3863 | } |
3906 | break; | 3864 | break; |
3907 | /* Do not propagate hints across type conversions. */ | 3865 | /* Do not propagate hints across type conversions. */ |
3908 | case IR_CONV: case IR_TONUM: case IR_TOINT: case IR_TOBIT: | 3866 | case IR_CONV: case IR_TOBIT: |
3909 | break; | 3867 | break; |
3910 | default: | 3868 | default: |
3911 | /* Propagate hints across likely 'op reg, imm' or 'op reg'. */ | 3869 | /* Propagate hints across likely 'op reg, imm' or 'op reg'. */ |