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Diffstat (limited to 'src/lj_asm.c')
-rw-r--r--src/lj_asm.c21
1 files changed, 11 insertions, 10 deletions
diff --git a/src/lj_asm.c b/src/lj_asm.c
index 0402bf7a..3c0575ab 100644
--- a/src/lj_asm.c
+++ b/src/lj_asm.c
@@ -741,8 +741,9 @@ static int asm_snap_checkrename(ASMState *as, IRRef ren)
741 SnapEntry *map = &as->T->snapmap[snap->mapofs]; 741 SnapEntry *map = &as->T->snapmap[snap->mapofs];
742 MSize n, nent = snap->nent; 742 MSize n, nent = snap->nent;
743 for (n = 0; n < nent; n++) { 743 for (n = 0; n < nent; n++) {
744 IRRef ref = snap_ref(map[n]); 744 SnapEntry sn = map[n];
745 if (ref == ren) { 745 IRRef ref = snap_ref(sn);
746 if (ref == ren || (LJ_SOFTFP && (sn & SNAP_SOFTFPNUM) && ++ref == ren)) {
746 IRIns *ir = IR(ref); 747 IRIns *ir = IR(ref);
747 ra_spill(as, ir); /* Register renamed, so force a spill slot. */ 748 ra_spill(as, ir); /* Register renamed, so force a spill slot. */
748 RA_DBGX((as, "snaprensp $f $s", ref, ir->s)); 749 RA_DBGX((as, "snaprensp $f $s", ref, ir->s));
@@ -785,9 +786,9 @@ static void asm_collectargs(ASMState *as, IRIns *ir,
785 while (n-- > 1) { 786 while (n-- > 1) {
786 ir = IR(ir->op1); 787 ir = IR(ir->op1);
787 lua_assert(ir->o == IR_CARG); 788 lua_assert(ir->o == IR_CARG);
788 args[n] = ir->op2; 789 args[n] = ir->op2 == REF_NIL ? 0 : ir->op2;
789 } 790 }
790 args[0] = ir->op1; 791 args[0] = ir->op1 == REF_NIL ? 0 : ir->op1;
791 lua_assert(IR(ir->op1)->o != IR_CARG); 792 lua_assert(IR(ir->op1)->o != IR_CARG);
792} 793}
793 794
@@ -1181,12 +1182,6 @@ static void asm_head_side(ASMState *as)
1181 } 1182 }
1182 as->T->spadjust = (uint16_t)spadj; 1183 as->T->spadjust = (uint16_t)spadj;
1183 1184
1184#if !LJ_TARGET_X86ORX64
1185 /* Restore BASE register from parent spill slot. */
1186 if (ra_hasspill(irp->s))
1187 emit_spload(as, IR(REF_BASE), IR(REF_BASE)->r, spdelta + sps_scale(irp->s));
1188#endif
1189
1190 /* Reload spilled target registers. */ 1185 /* Reload spilled target registers. */
1191 if (pass2) { 1186 if (pass2) {
1192 for (i = as->stopins; i > REF_BASE; i--) { 1187 for (i = as->stopins; i > REF_BASE; i--) {
@@ -1222,6 +1217,12 @@ static void asm_head_side(ASMState *as)
1222 emit_setvmstate(as, (int32_t)as->T->traceno); 1217 emit_setvmstate(as, (int32_t)as->T->traceno);
1223 emit_spsub(as, spdelta); 1218 emit_spsub(as, spdelta);
1224 1219
1220#if !LJ_TARGET_X86ORX64
1221 /* Restore BASE register from parent spill slot. */
1222 if (ra_hasspill(irp->s))
1223 emit_spload(as, IR(REF_BASE), IR(REF_BASE)->r, sps_scale(irp->s));
1224#endif
1225
1225 /* Restore target registers from parent spill slots. */ 1226 /* Restore target registers from parent spill slots. */
1226 if (pass3) { 1227 if (pass3) {
1227 RegSet work = ~as->freeset & RSET_ALL; 1228 RegSet work = ~as->freeset & RSET_ALL;