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-rw-r--r--src/lj_asm_arm.h119
1 files changed, 70 insertions, 49 deletions
diff --git a/src/lj_asm_arm.h b/src/lj_asm_arm.h
index f922ed0f..56ce4a07 100644
--- a/src/lj_asm_arm.h
+++ b/src/lj_asm_arm.h
@@ -41,7 +41,7 @@ static Reg ra_scratchpair(ASMState *as, RegSet allow)
41 } 41 }
42 } 42 }
43 } 43 }
44 lua_assert(rset_test(RSET_GPREVEN, r)); 44 lj_assertA(rset_test(RSET_GPREVEN, r), "odd reg %d", r);
45 ra_modified(as, r); 45 ra_modified(as, r);
46 ra_modified(as, r+1); 46 ra_modified(as, r+1);
47 RA_DBGX((as, "scratchpair $r $r", r, r+1)); 47 RA_DBGX((as, "scratchpair $r $r", r, r+1));
@@ -269,7 +269,7 @@ static void asm_fusexref(ASMState *as, ARMIns ai, Reg rd, IRRef ref,
269 return; 269 return;
270 } 270 }
271 } else if (ir->o == IR_STRREF && !(!LJ_SOFTFP && (ai & 0x08000000))) { 271 } else if (ir->o == IR_STRREF && !(!LJ_SOFTFP && (ai & 0x08000000))) {
272 lua_assert(ofs == 0); 272 lj_assertA(ofs == 0, "bad usage");
273 ofs = (int32_t)sizeof(GCstr); 273 ofs = (int32_t)sizeof(GCstr);
274 if (irref_isk(ir->op2)) { 274 if (irref_isk(ir->op2)) {
275 ofs += IR(ir->op2)->i; 275 ofs += IR(ir->op2)->i;
@@ -389,9 +389,11 @@ static void asm_gencall(ASMState *as, const CCallInfo *ci, IRRef *args)
389 as->freeset |= (of & RSET_RANGE(REGARG_FIRSTGPR, REGARG_LASTGPR+1)); 389 as->freeset |= (of & RSET_RANGE(REGARG_FIRSTGPR, REGARG_LASTGPR+1));
390 if (irt_isnum(ir->t)) gpr = (gpr+1) & ~1u; 390 if (irt_isnum(ir->t)) gpr = (gpr+1) & ~1u;
391 if (gpr <= REGARG_LASTGPR) { 391 if (gpr <= REGARG_LASTGPR) {
392 lua_assert(rset_test(as->freeset, gpr)); /* Must have been evicted. */ 392 lj_assertA(rset_test(as->freeset, gpr),
393 "reg %d not free", gpr); /* Must have been evicted. */
393 if (irt_isnum(ir->t)) { 394 if (irt_isnum(ir->t)) {
394 lua_assert(rset_test(as->freeset, gpr+1)); /* Ditto. */ 395 lj_assertA(rset_test(as->freeset, gpr+1),
396 "reg %d not free", gpr+1); /* Ditto. */
395 emit_dnm(as, ARMI_VMOV_RR_D, gpr, gpr+1, (src & 15)); 397 emit_dnm(as, ARMI_VMOV_RR_D, gpr, gpr+1, (src & 15));
396 gpr += 2; 398 gpr += 2;
397 } else { 399 } else {
@@ -408,7 +410,8 @@ static void asm_gencall(ASMState *as, const CCallInfo *ci, IRRef *args)
408#endif 410#endif
409 { 411 {
410 if (gpr <= REGARG_LASTGPR) { 412 if (gpr <= REGARG_LASTGPR) {
411 lua_assert(rset_test(as->freeset, gpr)); /* Must have been evicted. */ 413 lj_assertA(rset_test(as->freeset, gpr),
414 "reg %d not free", gpr); /* Must have been evicted. */
412 if (ref) ra_leftov(as, gpr, ref); 415 if (ref) ra_leftov(as, gpr, ref);
413 gpr++; 416 gpr++;
414 } else { 417 } else {
@@ -433,7 +436,7 @@ static void asm_setupresult(ASMState *as, IRIns *ir, const CCallInfo *ci)
433 rset_clear(drop, (ir+1)->r); /* Dest reg handled below. */ 436 rset_clear(drop, (ir+1)->r); /* Dest reg handled below. */
434 ra_evictset(as, drop); /* Evictions must be performed first. */ 437 ra_evictset(as, drop); /* Evictions must be performed first. */
435 if (ra_used(ir)) { 438 if (ra_used(ir)) {
436 lua_assert(!irt_ispri(ir->t)); 439 lj_assertA(!irt_ispri(ir->t), "PRI dest");
437 if (!LJ_SOFTFP && irt_isfp(ir->t)) { 440 if (!LJ_SOFTFP && irt_isfp(ir->t)) {
438 if (LJ_ABI_SOFTFP || (ci->flags & (CCI_CASTU64|CCI_VARARG))) { 441 if (LJ_ABI_SOFTFP || (ci->flags & (CCI_CASTU64|CCI_VARARG))) {
439 Reg dest = (ra_dest(as, ir, RSET_FPR) & 15); 442 Reg dest = (ra_dest(as, ir, RSET_FPR) & 15);
@@ -530,13 +533,17 @@ static void asm_conv(ASMState *as, IRIns *ir)
530#endif 533#endif
531 IRRef lref = ir->op1; 534 IRRef lref = ir->op1;
532 /* 64 bit integer conversions are handled by SPLIT. */ 535 /* 64 bit integer conversions are handled by SPLIT. */
533 lua_assert(!irt_isint64(ir->t) && !(st == IRT_I64 || st == IRT_U64)); 536 lj_assertA(!irt_isint64(ir->t) && !(st == IRT_I64 || st == IRT_U64),
537 "IR %04d has unsplit 64 bit type",
538 (int)(ir - as->ir) - REF_BIAS);
534#if LJ_SOFTFP 539#if LJ_SOFTFP
535 /* FP conversions are handled by SPLIT. */ 540 /* FP conversions are handled by SPLIT. */
536 lua_assert(!irt_isfp(ir->t) && !(st == IRT_NUM || st == IRT_FLOAT)); 541 lj_assertA(!irt_isfp(ir->t) && !(st == IRT_NUM || st == IRT_FLOAT),
542 "IR %04d has FP type",
543 (int)(ir - as->ir) - REF_BIAS);
537 /* Can't check for same types: SPLIT uses CONV int.int + BXOR for sfp NEG. */ 544 /* Can't check for same types: SPLIT uses CONV int.int + BXOR for sfp NEG. */
538#else 545#else
539 lua_assert(irt_type(ir->t) != st); 546 lj_assertA(irt_type(ir->t) != st, "inconsistent types for CONV");
540 if (irt_isfp(ir->t)) { 547 if (irt_isfp(ir->t)) {
541 Reg dest = ra_dest(as, ir, RSET_FPR); 548 Reg dest = ra_dest(as, ir, RSET_FPR);
542 if (stfp) { /* FP to FP conversion. */ 549 if (stfp) { /* FP to FP conversion. */
@@ -553,7 +560,8 @@ static void asm_conv(ASMState *as, IRIns *ir)
553 } else if (stfp) { /* FP to integer conversion. */ 560 } else if (stfp) { /* FP to integer conversion. */
554 if (irt_isguard(ir->t)) { 561 if (irt_isguard(ir->t)) {
555 /* Checked conversions are only supported from number to int. */ 562 /* Checked conversions are only supported from number to int. */
556 lua_assert(irt_isint(ir->t) && st == IRT_NUM); 563 lj_assertA(irt_isint(ir->t) && st == IRT_NUM,
564 "bad type for checked CONV");
557 asm_tointg(as, ir, ra_alloc1(as, lref, RSET_FPR)); 565 asm_tointg(as, ir, ra_alloc1(as, lref, RSET_FPR));
558 } else { 566 } else {
559 Reg left = ra_alloc1(as, lref, RSET_FPR); 567 Reg left = ra_alloc1(as, lref, RSET_FPR);
@@ -572,7 +580,7 @@ static void asm_conv(ASMState *as, IRIns *ir)
572 Reg dest = ra_dest(as, ir, RSET_GPR); 580 Reg dest = ra_dest(as, ir, RSET_GPR);
573 if (st >= IRT_I8 && st <= IRT_U16) { /* Extend to 32 bit integer. */ 581 if (st >= IRT_I8 && st <= IRT_U16) { /* Extend to 32 bit integer. */
574 Reg left = ra_alloc1(as, lref, RSET_GPR); 582 Reg left = ra_alloc1(as, lref, RSET_GPR);
575 lua_assert(irt_isint(ir->t) || irt_isu32(ir->t)); 583 lj_assertA(irt_isint(ir->t) || irt_isu32(ir->t), "bad type for CONV EXT");
576 if ((as->flags & JIT_F_ARMV6)) { 584 if ((as->flags & JIT_F_ARMV6)) {
577 ARMIns ai = st == IRT_I8 ? ARMI_SXTB : 585 ARMIns ai = st == IRT_I8 ? ARMI_SXTB :
578 st == IRT_U8 ? ARMI_UXTB : 586 st == IRT_U8 ? ARMI_UXTB :
@@ -667,7 +675,7 @@ static void asm_tvptr(ASMState *as, Reg dest, IRRef ref)
667 ra_allockreg(as, i32ptr(ir_knum(ir)), dest); 675 ra_allockreg(as, i32ptr(ir_knum(ir)), dest);
668 } else { 676 } else {
669#if LJ_SOFTFP 677#if LJ_SOFTFP
670 lua_assert(0); 678 lj_assertA(0, "unsplit FP op");
671#else 679#else
672 /* Otherwise force a spill and use the spill slot. */ 680 /* Otherwise force a spill and use the spill slot. */
673 emit_opk(as, ARMI_ADD, dest, RID_SP, ra_spill(as, ir), RSET_GPR); 681 emit_opk(as, ARMI_ADD, dest, RID_SP, ra_spill(as, ir), RSET_GPR);
@@ -811,7 +819,7 @@ static void asm_href(ASMState *as, IRIns *ir, IROp merge)
811 *l_loop = ARMF_CC(ARMI_B, CC_NE) | ((as->mcp-l_loop-2) & 0x00ffffffu); 819 *l_loop = ARMF_CC(ARMI_B, CC_NE) | ((as->mcp-l_loop-2) & 0x00ffffffu);
812 820
813 /* Load main position relative to tab->node into dest. */ 821 /* Load main position relative to tab->node into dest. */
814 khash = irref_isk(refkey) ? ir_khash(irkey) : 1; 822 khash = irref_isk(refkey) ? ir_khash(as, irkey) : 1;
815 if (khash == 0) { 823 if (khash == 0) {
816 emit_lso(as, ARMI_LDR, dest, tab, (int32_t)offsetof(GCtab, node)); 824 emit_lso(as, ARMI_LDR, dest, tab, (int32_t)offsetof(GCtab, node));
817 } else { 825 } else {
@@ -867,7 +875,7 @@ static void asm_hrefk(ASMState *as, IRIns *ir)
867 Reg node = ra_alloc1(as, ir->op1, RSET_GPR); 875 Reg node = ra_alloc1(as, ir->op1, RSET_GPR);
868 Reg key = RID_NONE, type = RID_TMP, idx = node; 876 Reg key = RID_NONE, type = RID_TMP, idx = node;
869 RegSet allow = rset_exclude(RSET_GPR, node); 877 RegSet allow = rset_exclude(RSET_GPR, node);
870 lua_assert(ofs % sizeof(Node) == 0); 878 lj_assertA(ofs % sizeof(Node) == 0, "unaligned HREFK slot");
871 if (ofs > 4095) { 879 if (ofs > 4095) {
872 idx = dest; 880 idx = dest;
873 rset_clear(allow, dest); 881 rset_clear(allow, dest);
@@ -934,7 +942,7 @@ static void asm_uref(ASMState *as, IRIns *ir)
934static void asm_fref(ASMState *as, IRIns *ir) 942static void asm_fref(ASMState *as, IRIns *ir)
935{ 943{
936 UNUSED(as); UNUSED(ir); 944 UNUSED(as); UNUSED(ir);
937 lua_assert(!ra_used(ir)); 945 lj_assertA(!ra_used(ir), "unfused FREF");
938} 946}
939 947
940static void asm_strref(ASMState *as, IRIns *ir) 948static void asm_strref(ASMState *as, IRIns *ir)
@@ -971,25 +979,27 @@ static void asm_strref(ASMState *as, IRIns *ir)
971 979
972/* -- Loads and stores ---------------------------------------------------- */ 980/* -- Loads and stores ---------------------------------------------------- */
973 981
974static ARMIns asm_fxloadins(IRIns *ir) 982static ARMIns asm_fxloadins(ASMState *as, IRIns *ir)
975{ 983{
984 UNUSED(as);
976 switch (irt_type(ir->t)) { 985 switch (irt_type(ir->t)) {
977 case IRT_I8: return ARMI_LDRSB; 986 case IRT_I8: return ARMI_LDRSB;
978 case IRT_U8: return ARMI_LDRB; 987 case IRT_U8: return ARMI_LDRB;
979 case IRT_I16: return ARMI_LDRSH; 988 case IRT_I16: return ARMI_LDRSH;
980 case IRT_U16: return ARMI_LDRH; 989 case IRT_U16: return ARMI_LDRH;
981 case IRT_NUM: lua_assert(!LJ_SOFTFP); return ARMI_VLDR_D; 990 case IRT_NUM: lj_assertA(!LJ_SOFTFP, "unsplit FP op"); return ARMI_VLDR_D;
982 case IRT_FLOAT: if (!LJ_SOFTFP) return ARMI_VLDR_S; /* fallthrough */ 991 case IRT_FLOAT: if (!LJ_SOFTFP) return ARMI_VLDR_S; /* fallthrough */
983 default: return ARMI_LDR; 992 default: return ARMI_LDR;
984 } 993 }
985} 994}
986 995
987static ARMIns asm_fxstoreins(IRIns *ir) 996static ARMIns asm_fxstoreins(ASMState *as, IRIns *ir)
988{ 997{
998 UNUSED(as);
989 switch (irt_type(ir->t)) { 999 switch (irt_type(ir->t)) {
990 case IRT_I8: case IRT_U8: return ARMI_STRB; 1000 case IRT_I8: case IRT_U8: return ARMI_STRB;
991 case IRT_I16: case IRT_U16: return ARMI_STRH; 1001 case IRT_I16: case IRT_U16: return ARMI_STRH;
992 case IRT_NUM: lua_assert(!LJ_SOFTFP); return ARMI_VSTR_D; 1002 case IRT_NUM: lj_assertA(!LJ_SOFTFP, "unsplit FP op"); return ARMI_VSTR_D;
993 case IRT_FLOAT: if (!LJ_SOFTFP) return ARMI_VSTR_S; /* fallthrough */ 1003 case IRT_FLOAT: if (!LJ_SOFTFP) return ARMI_VSTR_S; /* fallthrough */
994 default: return ARMI_STR; 1004 default: return ARMI_STR;
995 } 1005 }
@@ -997,12 +1007,13 @@ static ARMIns asm_fxstoreins(IRIns *ir)
997 1007
998static void asm_fload(ASMState *as, IRIns *ir) 1008static void asm_fload(ASMState *as, IRIns *ir)
999{ 1009{
1000 if (ir->op1 == REF_NIL) { 1010 if (ir->op1 == REF_NIL) { /* FLOAD from GG_State with offset. */
1001 lua_assert(!ra_used(ir)); /* We can end up here if DCE is turned off. */ 1011 /* We can end up here if DCE is turned off. */
1012 lj_assertA(!ra_used(ir), "NYI FLOAD GG_State");
1002 } else { 1013 } else {
1003 Reg dest = ra_dest(as, ir, RSET_GPR); 1014 Reg dest = ra_dest(as, ir, RSET_GPR);
1004 Reg idx = ra_alloc1(as, ir->op1, RSET_GPR); 1015 Reg idx = ra_alloc1(as, ir->op1, RSET_GPR);
1005 ARMIns ai = asm_fxloadins(ir); 1016 ARMIns ai = asm_fxloadins(as, ir);
1006 int32_t ofs; 1017 int32_t ofs;
1007 if (ir->op2 == IRFL_TAB_ARRAY) { 1018 if (ir->op2 == IRFL_TAB_ARRAY) {
1008 ofs = asm_fuseabase(as, ir->op1); 1019 ofs = asm_fuseabase(as, ir->op1);
@@ -1026,7 +1037,7 @@ static void asm_fstore(ASMState *as, IRIns *ir)
1026 IRIns *irf = IR(ir->op1); 1037 IRIns *irf = IR(ir->op1);
1027 Reg idx = ra_alloc1(as, irf->op1, rset_exclude(RSET_GPR, src)); 1038 Reg idx = ra_alloc1(as, irf->op1, rset_exclude(RSET_GPR, src));
1028 int32_t ofs = field_ofs[irf->op2]; 1039 int32_t ofs = field_ofs[irf->op2];
1029 ARMIns ai = asm_fxstoreins(ir); 1040 ARMIns ai = asm_fxstoreins(as, ir);
1030 if ((ai & 0x04000000)) 1041 if ((ai & 0x04000000))
1031 emit_lso(as, ai, src, idx, ofs); 1042 emit_lso(as, ai, src, idx, ofs);
1032 else 1043 else
@@ -1038,8 +1049,8 @@ static void asm_xload(ASMState *as, IRIns *ir)
1038{ 1049{
1039 Reg dest = ra_dest(as, ir, 1050 Reg dest = ra_dest(as, ir,
1040 (!LJ_SOFTFP && irt_isfp(ir->t)) ? RSET_FPR : RSET_GPR); 1051 (!LJ_SOFTFP && irt_isfp(ir->t)) ? RSET_FPR : RSET_GPR);
1041 lua_assert(!(ir->op2 & IRXLOAD_UNALIGNED)); 1052 lj_assertA(!(ir->op2 & IRXLOAD_UNALIGNED), "unaligned XLOAD");
1042 asm_fusexref(as, asm_fxloadins(ir), dest, ir->op1, RSET_GPR, 0); 1053 asm_fusexref(as, asm_fxloadins(as, ir), dest, ir->op1, RSET_GPR, 0);
1043} 1054}
1044 1055
1045static void asm_xstore_(ASMState *as, IRIns *ir, int32_t ofs) 1056static void asm_xstore_(ASMState *as, IRIns *ir, int32_t ofs)
@@ -1047,7 +1058,7 @@ static void asm_xstore_(ASMState *as, IRIns *ir, int32_t ofs)
1047 if (ir->r != RID_SINK) { 1058 if (ir->r != RID_SINK) {
1048 Reg src = ra_alloc1(as, ir->op2, 1059 Reg src = ra_alloc1(as, ir->op2,
1049 (!LJ_SOFTFP && irt_isfp(ir->t)) ? RSET_FPR : RSET_GPR); 1060 (!LJ_SOFTFP && irt_isfp(ir->t)) ? RSET_FPR : RSET_GPR);
1050 asm_fusexref(as, asm_fxstoreins(ir), src, ir->op1, 1061 asm_fusexref(as, asm_fxstoreins(as, ir), src, ir->op1,
1051 rset_exclude(RSET_GPR, src), ofs); 1062 rset_exclude(RSET_GPR, src), ofs);
1052 } 1063 }
1053} 1064}
@@ -1066,8 +1077,9 @@ static void asm_ahuvload(ASMState *as, IRIns *ir)
1066 rset_clear(allow, type); 1077 rset_clear(allow, type);
1067 } 1078 }
1068 if (ra_used(ir)) { 1079 if (ra_used(ir)) {
1069 lua_assert((LJ_SOFTFP ? 0 : irt_isnum(ir->t)) || 1080 lj_assertA((LJ_SOFTFP ? 0 : irt_isnum(ir->t)) ||
1070 irt_isint(ir->t) || irt_isaddr(ir->t)); 1081 irt_isint(ir->t) || irt_isaddr(ir->t),
1082 "bad load type %d", irt_type(ir->t));
1071 dest = ra_dest(as, ir, (!LJ_SOFTFP && t == IRT_NUM) ? RSET_FPR : allow); 1083 dest = ra_dest(as, ir, (!LJ_SOFTFP && t == IRT_NUM) ? RSET_FPR : allow);
1072 rset_clear(allow, dest); 1084 rset_clear(allow, dest);
1073 } 1085 }
@@ -1133,10 +1145,13 @@ static void asm_sload(ASMState *as, IRIns *ir)
1133 IRType t = hiop ? IRT_NUM : irt_type(ir->t); 1145 IRType t = hiop ? IRT_NUM : irt_type(ir->t);
1134 Reg dest = RID_NONE, type = RID_NONE, base; 1146 Reg dest = RID_NONE, type = RID_NONE, base;
1135 RegSet allow = RSET_GPR; 1147 RegSet allow = RSET_GPR;
1136 lua_assert(!(ir->op2 & IRSLOAD_PARENT)); /* Handled by asm_head_side(). */ 1148 lj_assertA(!(ir->op2 & IRSLOAD_PARENT),
1137 lua_assert(irt_isguard(ir->t) || !(ir->op2 & IRSLOAD_TYPECHECK)); 1149 "bad parent SLOAD"); /* Handled by asm_head_side(). */
1150 lj_assertA(irt_isguard(ir->t) || !(ir->op2 & IRSLOAD_TYPECHECK),
1151 "inconsistent SLOAD variant");
1138#if LJ_SOFTFP 1152#if LJ_SOFTFP
1139 lua_assert(!(ir->op2 & IRSLOAD_CONVERT)); /* Handled by LJ_SOFTFP SPLIT. */ 1153 lj_assertA(!(ir->op2 & IRSLOAD_CONVERT),
1154 "unsplit SLOAD convert"); /* Handled by LJ_SOFTFP SPLIT. */
1140 if (hiop && ra_used(ir+1)) { 1155 if (hiop && ra_used(ir+1)) {
1141 type = ra_dest(as, ir+1, allow); 1156 type = ra_dest(as, ir+1, allow);
1142 rset_clear(allow, type); 1157 rset_clear(allow, type);
@@ -1152,8 +1167,9 @@ static void asm_sload(ASMState *as, IRIns *ir)
1152 Reg tmp = RID_NONE; 1167 Reg tmp = RID_NONE;
1153 if ((ir->op2 & IRSLOAD_CONVERT)) 1168 if ((ir->op2 & IRSLOAD_CONVERT))
1154 tmp = ra_scratch(as, t == IRT_INT ? RSET_FPR : RSET_GPR); 1169 tmp = ra_scratch(as, t == IRT_INT ? RSET_FPR : RSET_GPR);
1155 lua_assert((LJ_SOFTFP ? 0 : irt_isnum(ir->t)) || 1170 lj_assertA((LJ_SOFTFP ? 0 : irt_isnum(ir->t)) ||
1156 irt_isint(ir->t) || irt_isaddr(ir->t)); 1171 irt_isint(ir->t) || irt_isaddr(ir->t),
1172 "bad SLOAD type %d", irt_type(ir->t));
1157 dest = ra_dest(as, ir, (!LJ_SOFTFP && t == IRT_NUM) ? RSET_FPR : allow); 1173 dest = ra_dest(as, ir, (!LJ_SOFTFP && t == IRT_NUM) ? RSET_FPR : allow);
1158 rset_clear(allow, dest); 1174 rset_clear(allow, dest);
1159 base = ra_alloc1(as, REF_BASE, allow); 1175 base = ra_alloc1(as, REF_BASE, allow);
@@ -1218,7 +1234,8 @@ static void asm_cnew(ASMState *as, IRIns *ir)
1218 IRRef args[4]; 1234 IRRef args[4];
1219 RegSet allow = (RSET_GPR & ~RSET_SCRATCH); 1235 RegSet allow = (RSET_GPR & ~RSET_SCRATCH);
1220 RegSet drop = RSET_SCRATCH; 1236 RegSet drop = RSET_SCRATCH;
1221 lua_assert(sz != CTSIZE_INVALID || (ir->o == IR_CNEW && ir->op2 != REF_NIL)); 1237 lj_assertA(sz != CTSIZE_INVALID || (ir->o == IR_CNEW && ir->op2 != REF_NIL),
1238 "bad CNEW/CNEWI operands");
1222 1239
1223 as->gcsteps++; 1240 as->gcsteps++;
1224 if (ra_hasreg(ir->r)) 1241 if (ra_hasreg(ir->r))
@@ -1230,10 +1247,10 @@ static void asm_cnew(ASMState *as, IRIns *ir)
1230 /* Initialize immutable cdata object. */ 1247 /* Initialize immutable cdata object. */
1231 if (ir->o == IR_CNEWI) { 1248 if (ir->o == IR_CNEWI) {
1232 int32_t ofs = sizeof(GCcdata); 1249 int32_t ofs = sizeof(GCcdata);
1233 lua_assert(sz == 4 || sz == 8); 1250 lj_assertA(sz == 4 || sz == 8, "bad CNEWI size %d", sz);
1234 if (sz == 8) { 1251 if (sz == 8) {
1235 ofs += 4; ir++; 1252 ofs += 4; ir++;
1236 lua_assert(ir->o == IR_HIOP); 1253 lj_assertA(ir->o == IR_HIOP, "expected HIOP for CNEWI");
1237 } 1254 }
1238 for (;;) { 1255 for (;;) {
1239 Reg r = ra_alloc1(as, ir->op2, allow); 1256 Reg r = ra_alloc1(as, ir->op2, allow);
@@ -1299,7 +1316,7 @@ static void asm_obar(ASMState *as, IRIns *ir)
1299 MCLabel l_end; 1316 MCLabel l_end;
1300 Reg obj, val, tmp; 1317 Reg obj, val, tmp;
1301 /* No need for other object barriers (yet). */ 1318 /* No need for other object barriers (yet). */
1302 lua_assert(IR(ir->op1)->o == IR_UREFC); 1319 lj_assertA(IR(ir->op1)->o == IR_UREFC, "bad OBAR type");
1303 ra_evictset(as, RSET_SCRATCH); 1320 ra_evictset(as, RSET_SCRATCH);
1304 l_end = emit_label(as); 1321 l_end = emit_label(as);
1305 args[0] = ASMREF_TMP1; /* global_State *g */ 1322 args[0] = ASMREF_TMP1; /* global_State *g */
@@ -1575,7 +1592,7 @@ static void asm_bitshift(ASMState *as, IRIns *ir, ARMShift sh)
1575#define asm_bshr(as, ir) asm_bitshift(as, ir, ARMSH_LSR) 1592#define asm_bshr(as, ir) asm_bitshift(as, ir, ARMSH_LSR)
1576#define asm_bsar(as, ir) asm_bitshift(as, ir, ARMSH_ASR) 1593#define asm_bsar(as, ir) asm_bitshift(as, ir, ARMSH_ASR)
1577#define asm_bror(as, ir) asm_bitshift(as, ir, ARMSH_ROR) 1594#define asm_bror(as, ir) asm_bitshift(as, ir, ARMSH_ROR)
1578#define asm_brol(as, ir) lua_assert(0) 1595#define asm_brol(as, ir) lj_assertA(0, "unexpected BROL")
1579 1596
1580static void asm_intmin_max(ASMState *as, IRIns *ir, int cc) 1597static void asm_intmin_max(ASMState *as, IRIns *ir, int cc)
1581{ 1598{
@@ -1726,7 +1743,8 @@ static void asm_intcomp(ASMState *as, IRIns *ir)
1726 Reg left; 1743 Reg left;
1727 uint32_t m; 1744 uint32_t m;
1728 int cmpprev0 = 0; 1745 int cmpprev0 = 0;
1729 lua_assert(irt_isint(ir->t) || irt_isu32(ir->t) || irt_isaddr(ir->t)); 1746 lj_assertA(irt_isint(ir->t) || irt_isu32(ir->t) || irt_isaddr(ir->t),
1747 "bad comparison data type %d", irt_type(ir->t));
1730 if (asm_swapops(as, lref, rref)) { 1748 if (asm_swapops(as, lref, rref)) {
1731 Reg tmp = lref; lref = rref; rref = tmp; 1749 Reg tmp = lref; lref = rref; rref = tmp;
1732 if (cc >= CC_GE) cc ^= 7; /* LT <-> GT, LE <-> GE */ 1750 if (cc >= CC_GE) cc ^= 7; /* LT <-> GT, LE <-> GE */
@@ -1895,10 +1913,11 @@ static void asm_hiop(ASMState *as, IRIns *ir)
1895 case IR_CNEWI: 1913 case IR_CNEWI:
1896 /* Nothing to do here. Handled by lo op itself. */ 1914 /* Nothing to do here. Handled by lo op itself. */
1897 break; 1915 break;
1898 default: lua_assert(0); break; 1916 default: lj_assertA(0, "bad HIOP for op %d", (ir-1)->o); break;
1899 } 1917 }
1900#else 1918#else
1901 UNUSED(as); UNUSED(ir); lua_assert(0); 1919 /* Unused without SOFTFP or FFI. */
1920 UNUSED(as); UNUSED(ir); lj_assertA(0, "unexpected HIOP");
1902#endif 1921#endif
1903} 1922}
1904 1923
@@ -1923,7 +1942,7 @@ static void asm_stack_check(ASMState *as, BCReg topslot,
1923 if (irp) { 1942 if (irp) {
1924 if (!ra_hasspill(irp->s)) { 1943 if (!ra_hasspill(irp->s)) {
1925 pbase = irp->r; 1944 pbase = irp->r;
1926 lua_assert(ra_hasreg(pbase)); 1945 lj_assertA(ra_hasreg(pbase), "base reg lost");
1927 } else if (allow) { 1946 } else if (allow) {
1928 pbase = rset_pickbot(allow); 1947 pbase = rset_pickbot(allow);
1929 } else { 1948 } else {
@@ -1935,7 +1954,7 @@ static void asm_stack_check(ASMState *as, BCReg topslot,
1935 } 1954 }
1936 emit_branch(as, ARMF_CC(ARMI_BL, CC_LS), exitstub_addr(as->J, exitno)); 1955 emit_branch(as, ARMF_CC(ARMI_BL, CC_LS), exitstub_addr(as->J, exitno));
1937 k = emit_isk12(0, (int32_t)(8*topslot)); 1956 k = emit_isk12(0, (int32_t)(8*topslot));
1938 lua_assert(k); 1957 lj_assertA(k, "slot offset %d does not fit in K12", 8*topslot);
1939 emit_n(as, ARMI_CMP^k, RID_TMP); 1958 emit_n(as, ARMI_CMP^k, RID_TMP);
1940 emit_dnm(as, ARMI_SUB, RID_TMP, RID_TMP, pbase); 1959 emit_dnm(as, ARMI_SUB, RID_TMP, RID_TMP, pbase);
1941 emit_lso(as, ARMI_LDR, RID_TMP, RID_TMP, 1960 emit_lso(as, ARMI_LDR, RID_TMP, RID_TMP,
@@ -1972,7 +1991,8 @@ static void asm_stack_restore(ASMState *as, SnapShot *snap)
1972#if LJ_SOFTFP 1991#if LJ_SOFTFP
1973 RegSet odd = rset_exclude(RSET_GPRODD, RID_BASE); 1992 RegSet odd = rset_exclude(RSET_GPRODD, RID_BASE);
1974 Reg tmp; 1993 Reg tmp;
1975 lua_assert(irref_isk(ref)); /* LJ_SOFTFP: must be a number constant. */ 1994 /* LJ_SOFTFP: must be a number constant. */
1995 lj_assertA(irref_isk(ref), "unsplit FP op");
1976 tmp = ra_allock(as, (int32_t)ir_knum(ir)->u32.lo, 1996 tmp = ra_allock(as, (int32_t)ir_knum(ir)->u32.lo,
1977 rset_exclude(RSET_GPREVEN, RID_BASE)); 1997 rset_exclude(RSET_GPREVEN, RID_BASE));
1978 emit_lso(as, ARMI_STR, tmp, RID_BASE, ofs); 1998 emit_lso(as, ARMI_STR, tmp, RID_BASE, ofs);
@@ -1986,7 +2006,8 @@ static void asm_stack_restore(ASMState *as, SnapShot *snap)
1986 } else { 2006 } else {
1987 RegSet odd = rset_exclude(RSET_GPRODD, RID_BASE); 2007 RegSet odd = rset_exclude(RSET_GPRODD, RID_BASE);
1988 Reg type; 2008 Reg type;
1989 lua_assert(irt_ispri(ir->t) || irt_isaddr(ir->t) || irt_isinteger(ir->t)); 2009 lj_assertA(irt_ispri(ir->t) || irt_isaddr(ir->t) || irt_isinteger(ir->t),
2010 "restore of IR type %d", irt_type(ir->t));
1990 if (!irt_ispri(ir->t)) { 2011 if (!irt_ispri(ir->t)) {
1991 Reg src = ra_alloc1(as, ref, rset_exclude(RSET_GPREVEN, RID_BASE)); 2012 Reg src = ra_alloc1(as, ref, rset_exclude(RSET_GPREVEN, RID_BASE));
1992 emit_lso(as, ARMI_STR, src, RID_BASE, ofs); 2013 emit_lso(as, ARMI_STR, src, RID_BASE, ofs);
@@ -2006,7 +2027,7 @@ static void asm_stack_restore(ASMState *as, SnapShot *snap)
2006 } 2027 }
2007 checkmclim(as); 2028 checkmclim(as);
2008 } 2029 }
2009 lua_assert(map + nent == flinks); 2030 lj_assertA(map + nent == flinks, "inconsistent frames in snapshot");
2010} 2031}
2011 2032
2012/* -- GC handling --------------------------------------------------------- */ 2033/* -- GC handling --------------------------------------------------------- */
@@ -2092,7 +2113,7 @@ static RegSet asm_head_side_base(ASMState *as, IRIns *irp, RegSet allow)
2092 rset_clear(allow, ra_dest(as, ir, allow)); 2113 rset_clear(allow, ra_dest(as, ir, allow));
2093 } else { 2114 } else {
2094 Reg r = irp->r; 2115 Reg r = irp->r;
2095 lua_assert(ra_hasreg(r)); 2116 lj_assertA(ra_hasreg(r), "base reg lost");
2096 rset_clear(allow, r); 2117 rset_clear(allow, r);
2097 if (r != ir->r && !rset_test(as->freeset, r)) 2118 if (r != ir->r && !rset_test(as->freeset, r))
2098 ra_restore(as, regcost_ref(as->cost[r])); 2119 ra_restore(as, regcost_ref(as->cost[r]));
@@ -2114,7 +2135,7 @@ static void asm_tail_fixup(ASMState *as, TraceNo lnk)
2114 } else { 2135 } else {
2115 /* Patch stack adjustment. */ 2136 /* Patch stack adjustment. */
2116 uint32_t k = emit_isk12(ARMI_ADD, spadj); 2137 uint32_t k = emit_isk12(ARMI_ADD, spadj);
2117 lua_assert(k); 2138 lj_assertA(k, "stack adjustment %d does not fit in K12", spadj);
2118 p[-2] = (ARMI_ADD^k) | ARMF_D(RID_SP) | ARMF_N(RID_SP); 2139 p[-2] = (ARMI_ADD^k) | ARMF_D(RID_SP) | ARMF_N(RID_SP);
2119 } 2140 }
2120 /* Patch exit branch. */ 2141 /* Patch exit branch. */
@@ -2196,7 +2217,7 @@ void lj_asm_patchexit(jit_State *J, GCtrace *T, ExitNo exitno, MCode *target)
2196 if (!cstart) cstart = p; 2217 if (!cstart) cstart = p;
2197 } 2218 }
2198 } 2219 }
2199 lua_assert(cstart != NULL); 2220 lj_assertJ(cstart != NULL, "exit stub %d not found", exitno);
2200 lj_mcode_sync(cstart, cend); 2221 lj_mcode_sync(cstart, cend);
2201 lj_mcode_patch(J, mcarea, 1); 2222 lj_mcode_patch(J, mcarea, 1);
2202} 2223}