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* Merge branch 'master' into v2.1Mike Pall2016-03-0313-14/+14
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| * Bump copyright date to 2016.Mike Pall2016-03-0311-12/+12
* | DynASM/x64: Fix for full VREG support.Mike Pall2015-12-281-1/+2
* | DynASM/x86: Add AVX AES instructions.Mike Pall2015-12-281-0/+6
* | DynASM/x64: Add full VREG support.Mike Pall2015-12-282-36/+104
* | Merge branch 'master' into v2.1Mike Pall2015-11-041-0/+1
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| * DynASM/x86: Add rdpmc instruction.Mike Pall2015-11-041-0/+1
* | Whitespace.Mike Pall2015-10-241-1/+1
* | DynASM: Bump version to 1.4.Mike Pall2015-10-247-20/+20
* | DynASM/x86: Add AVX and AVX2 opcodes.Mike Pall2015-10-242-71/+338
* | DynASM/x86: Add AES-NI opcodes.Mike Pall2015-10-241-0/+9
* | Merge branch 'master' into v2.1Mike Pall2015-10-241-5/+5
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| * DynASM/x86: Restrict shld/shrd to operands with same width.Mike Pall2015-10-241-2/+2
| * DynASM/x86: Fix some SSE instruction templates.Mike Pall2015-10-241-3/+3
* | DynASM/PPC: Add sub/shift/rotate/clear instruction aliases.Mike Pall2015-04-121-5/+88
* | DynASM/PPC: Add support for parameterized shifts/masks.Mike Pall2015-04-122-6/+14
* | DynASM/PPC: Add missing PPC64 instructions and various extensions.Mike Pall2015-01-142-6/+592
* | DynASM/ARM64: Fix checks for scaled immediates.Mike Pall2015-01-071-2/+3
* | Merge branch 'master' into v2.1Mike Pall2015-01-0613-14/+14
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| * Bump copyright date to 2015.Mike Pall2015-01-0511-12/+12
* | DynASM/ARM64: Various fixes.Mike Pall2014-12-272-17/+50
* | Merge branch 'master' into v2.1Mike Pall2014-12-271-1/+4
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| * DynASM/ARM: Fix rollback for variant templates.Mike Pall2014-12-271-1/+4
* | DynASM/ARM64: Initial commit of ARM64 module.Mike Pall2014-12-032-0/+1650
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* DynASM/ARM: Fix description shown for multi-element templates.Mike Pall2014-12-031-1/+1
* DynASM/x86: Add fldenv, f[n]stenv, fxsave, fxrstor opcodes.Mike Pall2014-09-221-0/+5
* DynASM/x86: Add shld/shrd opcodes.Mike Pall2014-09-211-0/+3
* DynASM: Emit version check after .arch directive.Mike Pall2014-03-061-5/+4
* Bump copyright date to 2014.Mike Pall2014-01-1611-12/+12
* DynASM: Emit #line <n> <file> instead of #<n> <file>.Mike Pall2013-09-121-1/+1
* DynASM/x64: Add VREG support to mov64.Mike Pall2013-07-181-2/+8
* DynASM/x86: Add lock prefix.Mike Pall2013-06-241-1/+1
* DynASM: Improve validation of local backwards relocations.Mike Pall2013-03-174-4/+8
* Bump copyright date to 2013.Mike Pall2013-02-1111-12/+12
* DynASM/ARM: Fix conditional VFP instruction encoding.Mike Pall2012-10-151-1/+4
* DynASM/ARM: Add VFP instructions.Mike Pall2012-07-292-49/+235
* Change DynASM bit operations to use Lua BitOp.Mike Pall2012-07-084-130/+105
* DynASM/PPC: Add missing 64 bit rotates and mtocrf/mfocrf.Mike Pall2012-06-121-4/+33
* DynASM: Compatibility with minilua.Mike Pall2012-06-091-3/+14
* DynASM: Lua 5.2 compatibility fixes.Mike Pall2012-02-172-3/+11
* Bump copyright date to 2012.Mike Pall2012-01-2311-12/+12
* MIPS: Add missing opcodes to the DynASM MIPS module plus minor fixes.Mike Pall2012-01-232-4/+15
* MIPS: Add DynASM MIPS module and encoding engine.Mike Pall2011-12-162-0/+1363
* PPC: Fix externally provided relocation offsets in DynASM.Mike Pall2011-10-251-1/+1
* PPC: Add y-bit variants of conditional branches to DynASM.Mike Pall2011-09-051-0/+2
* PPC: Add PPC disassembler.Mike Pall2011-08-181-1/+1
* Clarify name of MIT license.Mike Pall2011-08-144-4/+4
* PPC: Add mtcrf instruction to DynASM.Mike Pall2011-08-101-1/+4
* PPC: Fix range check for scaled immediates in DynASM.Mike Pall2011-07-021-1/+4
* ARM: Remove redundant parse_gpr() in DynASM.Mike Pall2011-05-161-1/+0
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