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* Merge branch 'master' into v2.1Mike Pall2025-01-131-1/+1
* Fix compiler warning.Mike Pall2024-04-191-1/+1
* Check for upvalue state transition in IR_UREFO.Mike Pall2023-11-051-6/+14
* ARM64: Fix register hint for FFI calls with FP results.Mike Pall2023-10-081-1/+1
* ARM64: Fix IR_HREF code generation for constant FP keys.Mike Pall2023-09-211-15/+14
* ARM64: Fuse negative 32 bit constants into arithmetic ops again.Mike Pall2023-09-211-1/+2
* Windows/ARM64: Support Windows calling conventions.Mike Pall2023-09-111-1/+16
* ARM64: Fuse rotates into logical operands.Mike Pall2023-09-091-2/+6
* ARM64: Don't fuse sign extensions into logical operands.Mike Pall2023-09-091-7/+4
* ARM64: Ensure branch is in range before emitting TBZ/TBNZ.Mike Pall2023-09-091-10/+14
* ARM64: Improve integer IR_MUL code generation.Mike Pall2023-09-091-2/+1
* ARM64: Simplify code generation for IR_STRTO.Mike Pall2023-09-091-7/+4
* ARM64: Use RID_TMP instead of scratch register in more places.Mike Pall2023-09-091-13/+10
* ARM64: Improve IR_OBAR code generation.Mike Pall2023-09-091-5/+3
* ARM64: Improve IR_UREF code generation.Mike Pall2023-09-091-8/+6
* ARM64: Improve IR_HREF code generation.Mike Pall2023-09-091-86/+40
* ARM64: Reload BASE via GL instead of spilling it.Mike Pall2023-09-091-54/+37
* ARM64: Inline only use of emit_loada.Mike Pall2023-09-091-3/+6
* ARM64: Improve register allocation for integer IR_MUL/IR_MULOV.Mike Pall2023-08-291-1/+1
* ARM64: Fix register allocation for IR_*LOAD.Mike Pall2023-08-291-1/+3
* FFI/ARM64/OSX: Handle non-standard OSX C calling conventions.Mike Pall2023-08-291-15/+60
* ARM64: Prevent STP fusion for conditional code emitted by TBAR.Mike Pall2023-08-281-1/+2
* Merge branch 'master' into v2.1Mike Pall2023-08-201-1/+1
* ARM64: Add support for ARM64e pointer authentication codes (PAC).Mike Pall2023-08-121-3/+3
* ARM64: Fix assembly of HREFK (again).Mike Pall2023-08-121-1/+1
* Merge branch 'master' into v2.1Mike Pall2023-07-121-4/+3
* ARM64: Fix assembly of HREFK.Mike Pall2023-07-091-1/+1
* Disable FMA by default. Use -Ofma or jit.opt.start("+fma") to enable.Mike Pall2022-12-071-1/+2
* ARM64: Fix code generation for IR_SLOAD with typecheck + conversion.Mike Pall2022-12-011-1/+1
* ARM64: Fix IR_SLOAD assembly.Mike Pall2022-10-041-1/+1
* Add missing check for LJ_KEYINDEX in ITERN recording.Mike Pall2022-04-021-1/+1
* Merge branch 'master' into v2.1Mike Pall2022-01-151-1/+1
* ARM64: Fix IR_HREF code generation.Mike Pall2021-10-021-3/+3
* Compile table traversals: next(), pairs(), BC_ISNEXT/BC_ITERN.Mike Pall2021-09-191-1/+8
* Use IR_HIOP for generalized two-register returns.Mike Pall2021-09-191-4/+21
* Refactor IR_VLOAD to take an offset.Mike Pall2021-09-191-0/+1
* MIPS: Fix trace linking.Mike Pall2021-09-191-0/+6
* String buffers, part 3c: Add IRBUFHDR_WRITE mode.Mike Pall2021-07-191-0/+15
* String buffers, part 3a: Add IR_TMPREF for passing TValues to helpers.Mike Pall2021-07-191-12/+16
* Add IRCONV_NONE for pass-through INT to I64/U64 type change.Mike Pall2021-07-191-1/+1
* ARM64: More improvements to the generation of immediates.Mike Pall2021-06-031-15/+8
* Merge branch 'master' into v2.1Mike Pall2021-01-021-1/+1
* ARM64: Followup fix for exit branch patching.Mike Pall2020-09-281-1/+1
* Merge branch 'master' into v2.1Mike Pall2020-09-271-2/+11
* Redesign and harden string interning.Mike Pall2020-06-231-2/+2
* Improve assertions.Mike Pall2020-06-151-41/+54
* Remove pow() splitting and cleanup backends.Mike Pall2020-05-231-38/+1
* Cleanup math function compilation and fix inconsistencies.Mike Pall2020-05-221-1/+0
* Fix math.min()/math.max() inconsistencies.Mike Pall2020-05-221-3/+3
* ARM64: Fix {AHUV}LOAD specialized to nil/false/true.Mike Pall2020-05-181-1/+1
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