| Commit message (Expand) | Author | Age | Files | Lines |
* | LJ_GC64: Ensure all IR slot fields are initialized. | Mike Pall | 2016-06-03 | 1 | -0/+1 |
* | Proper fix for LJ_GC64 changes to asm_href(). | Mike Pall | 2016-05-28 | 1 | -2/+4 |
* | Fix collateral damage from LJ_GC64 changes to asm_href(). | Mike Pall | 2016-05-28 | 1 | -2/+1 |
* | Merge branch 'master' into v2.1 | Mike Pall | 2016-05-23 | 1 | -4/+17 |
|\ |
|
| * | x86: Don't spill an explicit REF_BASE in the IR. | Mike Pall | 2016-05-23 | 1 | -3/+3 |
* | | x64/LJ_GC64: Add missing backend support and enable JIT compilation. | Mike Pall | 2016-05-23 | 1 | -53/+377 |
* | | LJ_FR2: Add support for trace recording and snapshots. | Mike Pall | 2016-05-23 | 1 | -4/+18 |
* | | Embed 64 bit constants directly in the IR, using two slots. | Mike Pall | 2016-05-23 | 1 | -11/+15 |
* | | Add IR_FLOAD with REF_NIL for field loads from GG_State. | Mike Pall | 2016-05-21 | 1 | -1/+10 |
* | | Move common 32/64 bit in-memory FP constants to jit_State. | Mike Pall | 2016-05-21 | 1 | -10/+6 |
* | | Merge branch 'master' into v2.1 | Mike Pall | 2016-05-20 | 1 | -1/+0 |
|\| |
|
| * | Add guard for obscure aliasing between open upvalues and SSA slots. | Mike Pall | 2016-05-20 | 1 | -1/+0 |
* | | Merge branch 'master' into v2.1 | Mike Pall | 2016-05-06 | 1 | -3/+3 |
|\| |
|
| * | x86/x64: Fix instruction length decoder. | Mike Pall | 2016-05-06 | 1 | -3/+3 |
* | | Merge branch 'master' into v2.1 | Mike Pall | 2016-04-18 | 1 | -11/+11 |
|\| |
|
| * | Whitespace. | Mike Pall | 2016-04-18 | 1 | -11/+11 |
* | | Merge branch 'master' into v2.1 | Mike Pall | 2016-04-18 | 1 | -9/+104 |
|\| |
|
| * | x86/x64: Search for exit jumps with instruction length decoder. | Mike Pall | 2016-04-18 | 1 | -9/+104 |
* | | x86: Generate BMI2 shifts and rotates, if available. | Mike Pall | 2016-03-28 | 1 | -6/+22 |
* | | Merge branch 'master' into v2.1 | Mike Pall | 2016-03-03 | 1 | -1/+1 |
|\| |
|
| * | Bump copyright date to 2016. | Mike Pall | 2016-03-03 | 1 | -1/+1 |
* | | Merge branch 'master' into v2.1 | Mike Pall | 2016-02-10 | 1 | -1/+1 |
|\| |
|
| * | Don't allocate unused 2nd result register in JIT compiler backend. | Mike Pall | 2016-02-10 | 1 | -1/+1 |
* | | Merge branch 'master' into v2.1 | Mike Pall | 2015-02-21 | 1 | -2/+6 |
|\| |
|
| * | x86/x64: Fix code generation for fused test/arith ops. | Mike Pall | 2015-02-21 | 1 | -2/+6 |
* | | Merge branch 'master' into v2.1 | Mike Pall | 2015-01-06 | 1 | -1/+1 |
|\| |
|
| * | Bump copyright date to 2015. | Mike Pall | 2015-01-05 | 1 | -1/+1 |
* | | Add LJ_FR2 mode: Two-slot frame info. | Mike Pall | 2015-01-03 | 1 | -1/+1 |
* | | x86/x64: Drop internal x87 math functions. Use libm functions. | Mike Pall | 2014-12-08 | 1 | -62/+20 |
* | | Merge branch 'master' into v2.1 | Mike Pall | 2014-10-08 | 1 | -1/+9 |
|\| |
|
| * | Fix fused constant loads under high register pressure. | Mike Pall | 2014-10-08 | 1 | -1/+9 |
* | | Merge branch 'master' into v2.1 | Mike Pall | 2014-05-27 | 1 | -1/+1 |
|\| |
|
| * | x86: Fix code generation for unused result of math.random(). | Mike Pall | 2014-05-27 | 1 | -1/+1 |
* | | Merge branch 'master' into v2.1 | Mike Pall | 2014-02-20 | 1 | -2/+3 |
|\| |
|
| * | Prevent BASE register coalescing if parent uses IR_RETF. | Mike Pall | 2014-02-19 | 1 | -2/+3 |
* | | Merge branch 'master' into v2.1 | Mike Pall | 2014-01-16 | 1 | -1/+1 |
|\| |
|
| * | Bump copyright date to 2014. | Mike Pall | 2014-01-16 | 1 | -1/+1 |
* | | Low-overhead profiler, part 4: JIT compiler support. | Mike Pall | 2013-09-08 | 1 | -0/+10 |
* | | Save currently executing lua_State in g->cur_L. | Mike Pall | 2013-08-30 | 1 | -1/+1 |
* | | FFI: Compile VLA/VLS and large cdata allocs with default initialization. | Mike Pall | 2013-05-24 | 1 | -8/+17 |
* | | Merge branch 'master' into v2.1 | Mike Pall | 2013-05-16 | 1 | -2/+2 |
|\| |
|
| * | Handle calls with max. args in backends even after SPLIT. | Mike Pall | 2013-05-16 | 1 | -2/+2 |
* | | Refactor CCallInfo representation for split arguments. | Mike Pall | 2013-05-13 | 1 | -2/+2 |
* | | Combine IR instruction dispatch for all assembler backends. | Mike Pall | 2013-04-22 | 1 | -172/+107 |
* | | Use same HREF+EQ/NE optimization in all assembler backends. | Mike Pall | 2013-04-22 | 1 | -29/+17 |
* | | Reorganize generic operations common to all assembler backends. | Mike Pall | 2013-04-22 | 1 | -122/+53 |
* | | Compile string concatenations (BC_CAT). | Mike Pall | 2013-04-21 | 1 | -0/+5 |
* | | Merge branch 'master' into v2.1 | Mike Pall | 2013-04-04 | 1 | -6/+3 |
|\| |
|
| * | Fix spurious red zone overflows in machine code generation. | Mike Pall | 2013-04-04 | 1 | -0/+1 |
| * | FFI/x86: Fix register allocation for 64 bit comparisons. | Mike Pall | 2013-04-04 | 1 | -6/+2 |