| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | Merge branch 'master' into v2.1 | Mike Pall | 2025-01-13 | 1 | -1/+1 |
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| | * | Bump copyright date. | Mike Pall | 2025-01-13 | 1 | -1/+1 |
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| * | | Typo. | Mike Pall | 2024-05-25 | 1 | -2/+2 |
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| * | | Merge branch 'master' into v2.1 | Mike Pall | 2023-08-29 | 1 | -1/+1 |
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| | * | Update external MSDN URL in code. | Mike Pall | 2023-08-29 | 1 | -1/+1 |
| | | | | | | | | | Thanks to Kyle Marshall. #1060 | ||||
| * | | Merge branch 'master' into v2.1 | Mike Pall | 2023-08-20 | 1 | -1/+1 |
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| | * | Bump copyright date. | Mike Pall | 2023-08-20 | 1 | -1/+1 |
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| * | | ARM64: Add support for ARM64e pointer authentication codes (PAC). | Mike Pall | 2023-08-12 | 1 | -0/+3 |
| | | | | | | | | | Contributed by Peter Cawley. #559 | ||||
| * | | Disable FMA by default. Use -Ofma or jit.opt.start("+fma") to enable. | Mike Pall | 2022-12-07 | 1 | -1/+3 |
| | | | | | | | | | See the discussion in #918 for the rationale. | ||||
| * | | Avoid zero-sized arrays in jit_State. | Mike Pall | 2022-06-08 | 1 | -0/+6 |
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| * | | Don't use jit_State during build with JIT disabled. | Mike Pall | 2022-06-08 | 1 | -0/+2 |
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| * | | Merge branch 'master' into v2.1 | Mike Pall | 2022-01-15 | 1 | -1/+1 |
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| | * | Bump copyright date. | Mike Pall | 2022-01-15 | 1 | -1/+1 |
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| * | | Compile table traversals: next(), pairs(), BC_ISNEXT/BC_ITERN. | Mike Pall | 2021-09-19 | 1 | -1/+5 |
| | | | | | | | | | Sponsored by OpenResty Inc. | ||||
| * | | Handle on-trace OOM errors from helper functions. | Mike Pall | 2021-03-23 | 1 | -0/+2 |
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| * | | Merge branch 'master' into v2.1 | Mike Pall | 2021-01-02 | 1 | -1/+1 |
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| | * | Bump copyright date. | Mike Pall | 2021-01-02 | 1 | -1/+1 |
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| * | | Merge branch 'master' into v2.1 | Mike Pall | 2020-08-05 | 1 | -5/+1 |
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| | * | ARM: Ensure relative GG_State element alignment differently. | Mike Pall | 2020-08-05 | 1 | -5/+1 |
| | | | | | | | | | Thanks to jojo59516 and dwing4g. | ||||
| * | | Use a securely seeded global PRNG for the VM. | Mike Pall | 2020-06-15 | 1 | -11/+2 |
| | | | | | | | | | It's not 2005 anymore. | ||||
| * | | Improve assertions. | Mike Pall | 2020-06-15 | 1 | -0/+6 |
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| * | | Cleanup CPU detection and tuning for old CPUs. | Mike Pall | 2020-05-20 | 1 | -43/+51 |
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| * | | Merge branch 'master' into v2.1 | Mike Pall | 2020-01-20 | 1 | -1/+1 |
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| | * | Bump copyright date. | Mike Pall | 2020-01-20 | 1 | -1/+1 |
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| * | | MIPS: Add MIPS64 R6 port. | Mike Pall | 2020-01-20 | 1 | -0/+8 |
| | | | | | | | | | | | | | Contributed by Hua Zhang, YunQiang Su from Wave Computing, and Radovan Birdic from RT-RK. Sponsored by Wave Computing. | ||||
| * | | Merge branch 'master' into v2.1 | Mike Pall | 2019-01-10 | 1 | -5/+5 |
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| | * | Fix overflow of snapshot map offset. | Mike Pall | 2019-01-10 | 1 | -5/+5 |
| | | | | | | | | | Thanks to Yichun Zhang. | ||||
| * | | MIPS64: Add soft-float support to JIT compiler backend. | Mike Pall | 2017-06-07 | 1 | -2/+2 |
| | | | | | | | | | | | Contributed by Djordje Kovacevic and Stefan Pejic from RT-RK.com. Sponsored by Cisco Systems, Inc. | ||||
| * | | Merge branch 'master' into v2.1 | Mike Pall | 2017-06-07 | 1 | -0/+6 |
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| | * | MIPS: Fix handling of spare long-range jump slots. | Mike Pall | 2017-06-07 | 1 | -0/+6 |
| | | | | | | | | | Contributed by Djordje Kovacevic and Stefan Pejic. | ||||
| * | | MIPS64, part 2: Add MIPS64 hard-float JIT compiler backend. | Mike Pall | 2017-02-20 | 1 | -0/+8 |
| | | | | | | | | | | | Contributed by Djordje Kovacevic and Stefan Pejic from RT-RK.com. Sponsored by Cisco Systems, Inc. | ||||
| * | | Merge branch 'master' into v2.1 | Mike Pall | 2017-01-17 | 1 | -1/+1 |
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| | * | Bump copyright date to 2017. | Mike Pall | 2017-01-17 | 1 | -1/+1 |
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| * | | MIPS64, part 1: Add MIPS64 support to interpreter. | Mike Pall | 2016-05-28 | 1 | -2/+6 |
| | | | | | | | | | | | Contributed by Djordje Kovacevic and Stefan Pejic from RT-RK.com. Sponsored by Cisco Systems, Inc. | ||||
| * | | LJ_FR2: Add support for trace recording and snapshots. | Mike Pall | 2016-05-23 | 1 | -1/+13 |
| | | | | | | | | | Contributed by Peter Cawley. | ||||
| * | | Strip out old infrastructure for 64 bit constants. | Mike Pall | 2016-05-23 | 1 | -1/+0 |
| | | | | | | | | | Contributed by Peter Cawley. | ||||
| * | | Embed 64 bit constants directly in the IR, using two slots. | Mike Pall | 2016-05-23 | 1 | -2/+2 |
| | | | | | | | | | Contributed by Peter Cawley. | ||||
| * | | Simplify GCtrace * reference embedding for trace stitching. | Mike Pall | 2016-05-22 | 1 | -1/+1 |
| | | | | | | | | | | | This is now possible due to the immovable IR. Contributed by Peter Cawley. | ||||
| * | | Make the IR immovable after assembly. | Mike Pall | 2016-05-22 | 1 | -0/+1 |
| | | | | | | | | | | | This allows embedding pointers to IR constants in the machine code. Contributed by Peter Cawley. | ||||
| * | | Move common 32/64 bit in-memory FP constants to jit_State. | Mike Pall | 2016-05-21 | 1 | -1/+34 |
| | | | | | | | | | | | Prerequisite for immovable IR. Contributed by Peter Cawley. | ||||
| * | | x86: Detect BMI2 instruction support. | Mike Pall | 2016-03-28 | 1 | -1/+2 |
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| * | | Merge branch 'master' into v2.1 | Mike Pall | 2016-03-03 | 1 | -1/+1 |
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| | * | Bump copyright date to 2016. | Mike Pall | 2016-03-03 | 1 | -1/+1 |
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| * | | Re-enable trace stitching. | Mike Pall | 2015-08-29 | 1 | -0/+1 |
| | | | | | | | | | Thanks to Vyacheslav Egorov. | ||||
| * | | Disable table allocation bump optimization (for now). | Mike Pall | 2015-06-13 | 1 | -0/+2 |
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| * | | Fix table allocation bump optimization. | Mike Pall | 2015-05-21 | 1 | -0/+1 |
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| * | | Bump table allocations retroactively if they grow later on. | Mike Pall | 2015-05-19 | 1 | -1/+13 |
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| * | | Merge branch 'master' into v2.1 | Mike Pall | 2015-01-06 | 1 | -1/+1 |
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| | * | Bump copyright date to 2015. | Mike Pall | 2015-01-05 | 1 | -1/+1 |
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| * | | Add LJ_GC64 mode: 64 bit GC object references. | Mike Pall | 2015-01-03 | 1 | -0/+3 |
| | | | | | | | | | Actually NaN tagging with 47 bit pointers and 13+4 bit tags. | ||||
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