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* Windows/ARM64: Fix exception unwinding (again).Mike Pall2023-09-152-16/+38
* Windows/ARM64: Fix typo in exception unwinding.Mike Pall2023-09-111-1/+1
* FFI: Fix 64 bit shift fold rules.Mike Pall2023-09-111-4/+4
* Windows/ARM64: Support Windows calling conventions.Mike Pall2023-09-114-9/+36
* Windows/ARM64: Fix exception unwinding.Mike Pall2023-09-112-11/+13
* ARM64: Remove unneeded IRCALL_* defs for math intrinsics.Mike Pall2023-09-111-1/+1
* Fix Cygwin build.Mike Pall2023-09-111-1/+1
* Merge branch 'master' into v2.1Mike Pall2023-09-101-0/+1
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| * Allow path overrides in genversion.lua with minilua, too.Mike Pall2023-09-101-0/+1
* | Windows/ARM64: Add initial support.Mike Pall2023-09-107-37/+147
* | Merge branch 'master' into v2.1Mike Pall2023-09-092-4/+14
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| * Improve architecture detection error messages.Mike Pall2023-09-092-8/+16
* | ARM64: Fuse rotates into logical operands.Mike Pall2023-09-091-2/+6
* | ARM64: Don't fuse sign extensions into logical operands.Mike Pall2023-09-091-7/+4
* | ARM64: Disassemble rotates on logical operands.Mike Pall2023-09-091-25/+17
* | Merge branch 'master' into v2.1Mike Pall2023-09-091-2/+5
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| * ARM: Fix stack check code generation.Mike Pall2023-09-091-2/+5
* | ARM64: Fix LDP/STP fusion (again).Mike Pall2023-09-091-4/+13
* | ARM64: Ensure branch is in range before emitting TBZ/TBNZ.Mike Pall2023-09-091-10/+14
* | Merge branch 'master' into v2.1Mike Pall2023-09-091-1/+1
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| * Fix mcode limit check for non-x86 archs.Mike Pall2023-09-091-1/+1
* | ARM64: Improve BC_JLOOP.Mike Pall2023-09-091-2/+1
* | ARM64: Improve integer IR_MUL code generation.Mike Pall2023-09-091-2/+1
* | ARM64: Simplify code generation for IR_STRTO.Mike Pall2023-09-091-7/+4
* | ARM64: Use RID_TMP instead of scratch register in more places.Mike Pall2023-09-091-13/+10
* | ARM64: Improve IR_OBAR code generation.Mike Pall2023-09-091-5/+3
* | ARM64: Improve IR_UREF code generation.Mike Pall2023-09-091-8/+6
* | ARM64: Improve IR_HREF code generation.Mike Pall2023-09-091-86/+40
* | ARM64: Reload BASE via GL instead of spilling it.Mike Pall2023-09-092-55/+38
* | ARM64: Consolidate 32/64-bit constant handling in assembler.Mike Pall2023-09-092-36/+41
* | ARM64: Tune emit_lsptr. Avoid wrong load for asm_prof.Mike Pall2023-09-091-11/+12
* | ARM64: Inline only use of emit_loada.Mike Pall2023-09-092-5/+6
* | ARM64: Improve K13 constant rematerialization.Mike Pall2023-09-091-20/+12
* | Merge branch 'master' into v2.1Mike Pall2023-09-092-4/+13
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| * Add NaN check to IR_NEWREF.Mike Pall2023-09-092-4/+13
* | Merge branch 'master' into v2.1Mike Pall2023-09-092-4/+8
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| * Allow override of paths for genversion.lua.Mike Pall2023-09-091-3/+3
| * Fix native MinGW build.Mike Pall2023-09-091-1/+5
* | Add randomized register allocation for fuzz testing.Mike Pall2023-08-304-7/+58
* | ARM64: Improve register allocation for integer IR_MUL/IR_MULOV.Mike Pall2023-08-291-1/+1
* | ARM64: Fix register allocation for IR_*LOAD.Mike Pall2023-08-291-1/+3
* | Merge branch 'master' into v2.1Mike Pall2023-08-291-1/+1
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| * Update external MSDN URL in code.Mike Pall2023-08-291-1/+1
* | FFI/ARM64/OSX: Handle non-standard OSX C calling conventions.Mike Pall2023-08-294-21/+98
* | FFI: Unify stack setup for C calls in interpreter.Mike Pall2023-08-299-53/+62
* | ARM64: Prevent STP fusion for conditional code emitted by TBAR.Mike Pall2023-08-281-1/+2
* | ARM64: Fix LDP/STP fusing for unaligned accesses.Mike Pall2023-08-281-1/+1
* | Merge branch 'master' into v2.1Mike Pall2023-08-281-5/+13
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| * Handle table unsinking in the presence of IRFL_TAB_NOMM.Mike Pall2023-08-281-5/+15
* | Merge branch 'master' into v2.1Mike Pall2023-08-288-13/+14
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