Sprinkle a few BTI instructions into the arm64 assembly files and pass

-mmark-bti-property to indicate those now have BTI support.

ok jsing@, deraadt@

2 files changed, 8 insertions, 1 deletions

diff --git a/src/lib/libcrypto/arch/aarch64/Makefile.inc b/src/lib/libcrypto/arch/aarch64/Makefile.inc
index b953494234..82a1e4c6e5 100644
--- a/src/lib/libcrypto/arch/aarch64/Makefile.inc
+++ b/src/lib/libcrypto/arch/aarch64/Makefile.inc
@@ -1,4 +1,4 @@
-# $OpenBSD: Makefile.inc,v 1.4 2023/01/31 06:17:10 jsing Exp $
+# $OpenBSD: Makefile.inc,v 1.5 2023/04/05 11:07:40 kettenis Exp $
 
 # aarch64-specific libcrypto build rules
 
@@ -27,4 +27,5 @@ ${f}.S: ${LCRYPTO_SRC}/${dir}/asm/${f}.pl
 .endfor
 
 CFLAGS+= -DOPENSSL_CPUID_OBJ
+AFLAGS+= -mmark-bti-property
 SRCS+=  arm64cpuid.S arm64cap.c
diff --git a/src/lib/libcrypto/arch/aarch64/arm64cpuid.S b/src/lib/libcrypto/arch/aarch64/arm64cpuid.S
index d267ad6897..96a9c76fb1 100644
--- a/src/lib/libcrypto/arch/aarch64/arm64cpuid.S
+++ b/src/lib/libcrypto/arch/aarch64/arm64cpuid.S
@@ -7,6 +7,7 @@
 .globl  _armv7_neon_probe
 .type   _armv7_neon_probe,%function
 _armv7_neon_probe:
+        bti     c
         orr     v15.16b, v15.16b, v15.16b
         ret
 .size   _armv7_neon_probe,.-_armv7_neon_probe
@@ -14,6 +15,7 @@ _armv7_neon_probe:
 .globl  _armv8_aes_probe
 .type   _armv8_aes_probe,%function
 _armv8_aes_probe:
+        bti     c
         aese    v0.16b, v0.16b
         ret
 .size   _armv8_aes_probe,.-_armv8_aes_probe
@@ -21,6 +23,7 @@ _armv8_aes_probe:
 .globl  _armv8_sha1_probe
 .type   _armv8_sha1_probe,%function
 _armv8_sha1_probe:
+        bti     c
         sha1h   s0, s0
         ret
 .size   _armv8_sha1_probe,.-_armv8_sha1_probe
@@ -28,6 +31,7 @@ _armv8_sha1_probe:
 .globl  _armv8_sha256_probe
 .type   _armv8_sha256_probe,%function
 _armv8_sha256_probe:
+        bti     c
         sha256su0       v0.4s, v0.4s
         ret
 .size   _armv8_sha256_probe,.-_armv8_sha256_probe
@@ -35,6 +39,7 @@ _armv8_sha256_probe:
 .globl  _armv8_pmull_probe
 .type   _armv8_pmull_probe,%function
 _armv8_pmull_probe:
+        bti     c
         pmull   v0.1q, v0.1d, v0.1d
         ret
 .size   _armv8_pmull_probe,.-_armv8_pmull_probe
@@ -42,6 +47,7 @@ _armv8_pmull_probe:
 .globl  _armv8_sha512_probe
 .type   _armv8_sha512_probe,%function
 _armv8_sha512_probe:
+        bti     c
         sha512su0       v0.2d,v0.2d
         ret
 .size   _armv8_sha512_probe,.-_armv8_sha512_probe