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| author | jsing <> | 2026-05-07 15:38:03 +0000 |
|---|---|---|
| committer | jsing <> | 2026-05-07 15:38:03 +0000 |
| commit | ccc4eae3de33ef320762657c4be6c9dfd9c2de82 (patch) | |
| tree | 81f773dc013844248de1103391a3e49d252c1587 /src/lib/libcrypto/sha/sha512_amd64_generic.S | |
| parent | 97930339bcae324ce6c463f52bdcdf98c4be2941 (diff) | |
| download | openbsd-ccc4eae3de33ef320762657c4be6c9dfd9c2de82.tar.gz openbsd-ccc4eae3de33ef320762657c4be6c9dfd9c2de82.tar.bz2 openbsd-ccc4eae3de33ef320762657c4be6c9dfd9c2de82.zip | |
Use a define based instruction separator in SHA assembly.
Unfortunately, not all assemblers use the same instruction separator.
In particular, LLVM on macOS uses %% as an instruction separator, while
most other assemblers use a semi-colon.
ok kenjiro@ tb@
Diffstat (limited to 'src/lib/libcrypto/sha/sha512_amd64_generic.S')
| -rw-r--r-- | src/lib/libcrypto/sha/sha512_amd64_generic.S | 104 |
1 files changed, 53 insertions, 51 deletions
diff --git a/src/lib/libcrypto/sha/sha512_amd64_generic.S b/src/lib/libcrypto/sha/sha512_amd64_generic.S index de759875f4..fac9d95655 100644 --- a/src/lib/libcrypto/sha/sha512_amd64_generic.S +++ b/src/lib/libcrypto/sha/sha512_amd64_generic.S | |||
| @@ -1,4 +1,4 @@ | |||
| 1 | /* $OpenBSD: sha512_amd64_generic.S,v 1.4 2026/03/28 13:11:28 jsing Exp $ */ | 1 | /* $OpenBSD: sha512_amd64_generic.S,v 1.5 2026/05/07 15:38:03 jsing Exp $ */ |
| 2 | /* | 2 | /* |
| 3 | * Copyright (c) 2024 Joel Sing <jsing@openbsd.org> | 3 | * Copyright (c) 2024 Joel Sing <jsing@openbsd.org> |
| 4 | * | 4 | * |
| @@ -17,6 +17,8 @@ | |||
| 17 | 17 | ||
| 18 | #include "crypto_assembly.h" | 18 | #include "crypto_assembly.h" |
| 19 | 19 | ||
| 20 | #define _SEP CRYPTO_ASSEMBLY_SEPARATOR | ||
| 21 | |||
| 20 | #define ctx %rdi | 22 | #define ctx %rdi |
| 21 | #define in %rsi | 23 | #define in %rsi |
| 22 | #define num %rdx | 24 | #define num %rdx |
| @@ -45,8 +47,8 @@ | |||
| 45 | * Wt = Mt | 47 | * Wt = Mt |
| 46 | */ | 48 | */ |
| 47 | #define sha512_message_schedule_load(idx, m, w, wt) \ | 49 | #define sha512_message_schedule_load(idx, m, w, wt) \ |
| 48 | movq (m, round, 8), wt; \ | 50 | movq (m, round, 8), wt _SEP \ |
| 49 | bswapq wt; \ | 51 | bswapq wt _SEP \ |
| 50 | movq wt, ((idx&0xf)*8)(w) | 52 | movq wt, ((idx&0xf)*8)(w) |
| 51 | 53 | ||
| 52 | /* | 54 | /* |
| @@ -59,25 +61,25 @@ | |||
| 59 | * | 61 | * |
| 60 | */ | 62 | */ |
| 61 | #define sha512_message_schedule_update(idx, w, wt) \ | 63 | #define sha512_message_schedule_update(idx, w, wt) \ |
| 62 | movq (((idx-2)&0xf)*8)(w), wt; /* sigma1 */ \ | 64 | movq (((idx-2)&0xf)*8)(w), wt /* sigma1 */ _SEP \ |
| 63 | movq wt, tmp1; /* sigma1 */ \ | 65 | movq wt, tmp1 /* sigma1 */ _SEP \ |
| 64 | rorq $(61-19), tmp1; /* sigma1 */ \ | 66 | rorq $(61-19), tmp1 /* sigma1 */ _SEP \ |
| 65 | xorq wt, tmp1; /* sigma1 */ \ | 67 | xorq wt, tmp1 /* sigma1 */ _SEP \ |
| 66 | rorq $19, tmp1; /* sigma1 */ \ | 68 | rorq $19, tmp1 /* sigma1 */ _SEP \ |
| 67 | shrq $6, wt; /* sigma1 */ \ | 69 | shrq $6, wt /* sigma1 */ _SEP \ |
| 68 | xorq tmp1, wt; /* sigma1 */ \ | 70 | xorq tmp1, wt /* sigma1 */ _SEP \ |
| 69 | \ | 71 | \ |
| 70 | addq (((idx-7)&0xf)*8)(w), wt; /* Wt-7 */ \ | 72 | addq (((idx-7)&0xf)*8)(w), wt /* Wt-7 */ _SEP \ |
| 71 | addq (((idx-16)&0xf)*8)(w), wt; /* Wt-16 */ \ | 73 | addq (((idx-16)&0xf)*8)(w), wt /* Wt-16 */ _SEP \ |
| 72 | \ | 74 | \ |
| 73 | movq (((idx-15)&0xf)*8)(w), tmp2; /* sigma0 */ \ | 75 | movq (((idx-15)&0xf)*8)(w), tmp2 /* sigma0 */ _SEP \ |
| 74 | movq tmp2, tmp3; /* sigma0 */ \ | 76 | movq tmp2, tmp3 /* sigma0 */ _SEP \ |
| 75 | rorq $(8-1), tmp2; /* sigma0 */ \ | 77 | rorq $(8-1), tmp2 /* sigma0 */ _SEP \ |
| 76 | xorq tmp3, tmp2; /* sigma0 */ \ | 78 | xorq tmp3, tmp2 /* sigma0 */ _SEP \ |
| 77 | rorq $1, tmp2; /* sigma0 */ \ | 79 | rorq $1, tmp2 /* sigma0 */ _SEP \ |
| 78 | shrq $7, tmp3; /* sigma0 */ \ | 80 | shrq $7, tmp3 /* sigma0 */ _SEP \ |
| 79 | xorq tmp3, tmp2; /* sigma0 */ \ | 81 | xorq tmp3, tmp2 /* sigma0 */ _SEP \ |
| 80 | addq tmp2, wt; /* sigma0 */ \ | 82 | addq tmp2, wt /* sigma0 */ _SEP \ |
| 81 | \ | 83 | \ |
| 82 | movq wt, ((idx&0xf)*8)(w) | 84 | movq wt, ((idx&0xf)*8)(w) |
| 83 | 85 | ||
| @@ -95,49 +97,49 @@ | |||
| 95 | * Upon completion d = d + T1, h = T1 + T2, pending rotation. | 97 | * Upon completion d = d + T1, h = T1 + T2, pending rotation. |
| 96 | */ | 98 | */ |
| 97 | #define sha512_round(idx, a, b, c, d, e, f, g, h, k, w, wt) \ | 99 | #define sha512_round(idx, a, b, c, d, e, f, g, h, k, w, wt) \ |
| 98 | addq wt, h; /* T1 Wt */ \ | 100 | addq wt, h /* T1 Wt */ _SEP \ |
| 99 | addq (k512, round, 8), h; /* T1 Kt */ \ | 101 | addq (k512, round, 8), h /* T1 Kt */ _SEP \ |
| 100 | \ | 102 | \ |
| 101 | movq e, tmp1; /* T1 Sigma1 */ \ | 103 | movq e, tmp1 /* T1 Sigma1 */ _SEP \ |
| 102 | rorq $(41-18), tmp1; /* T1 Sigma1 */ \ | 104 | rorq $(41-18), tmp1 /* T1 Sigma1 */ _SEP \ |
| 103 | xorq e, tmp1; /* T1 Sigma1 */ \ | 105 | xorq e, tmp1 /* T1 Sigma1 */ _SEP \ |
| 104 | rorq $(18-14), tmp1; /* T1 Sigma1 */ \ | 106 | rorq $(18-14), tmp1 /* T1 Sigma1 */ _SEP \ |
| 105 | xorq e, tmp1; /* T1 Sigma1 */ \ | 107 | xorq e, tmp1 /* T1 Sigma1 */ _SEP \ |
| 106 | rorq $14, tmp1; /* T1 Sigma1 */ \ | 108 | rorq $14, tmp1 /* T1 Sigma1 */ _SEP \ |
| 107 | addq tmp1, h; /* T1 Sigma1 */ \ | 109 | addq tmp1, h /* T1 Sigma1 */ _SEP \ |
| 108 | \ | 110 | \ |
| 109 | movq f, tmp2; /* T1 Ch */ \ | 111 | movq f, tmp2 /* T1 Ch */ _SEP \ |
| 110 | xorq g, tmp2; /* T1 Ch */ \ | 112 | xorq g, tmp2 /* T1 Ch */ _SEP \ |
| 111 | andq e, tmp2; /* T1 Ch */ \ | 113 | andq e, tmp2 /* T1 Ch */ _SEP \ |
| 112 | xorq g, tmp2; /* T1 Ch */ \ | 114 | xorq g, tmp2 /* T1 Ch */ _SEP \ |
| 113 | addq tmp2, h; /* T1 Ch */ \ | 115 | addq tmp2, h /* T1 Ch */ _SEP \ |
| 114 | \ | 116 | \ |
| 115 | addq h, d; /* d += T1 */ \ | 117 | addq h, d /* d += T1 */ _SEP \ |
| 116 | \ | 118 | \ |
| 117 | movq a, tmp1; /* T2 Sigma0 */ \ | 119 | movq a, tmp1 /* T2 Sigma0 */ _SEP \ |
| 118 | rorq $(39-34), tmp1; /* T2 Sigma0 */ \ | 120 | rorq $(39-34), tmp1 /* T2 Sigma0 */ _SEP \ |
| 119 | xorq a, tmp1; /* T2 Sigma0 */ \ | 121 | xorq a, tmp1 /* T2 Sigma0 */ _SEP \ |
| 120 | rorq $(34-28), tmp1; /* T2 Sigma0 */ \ | 122 | rorq $(34-28), tmp1 /* T2 Sigma0 */ _SEP \ |
| 121 | xorq a, tmp1; /* T2 Sigma0 */ \ | 123 | xorq a, tmp1 /* T2 Sigma0 */ _SEP \ |
| 122 | rorq $28, tmp1; /* T2 Sigma0 */ \ | 124 | rorq $28, tmp1 /* T2 Sigma0 */ _SEP \ |
| 123 | addq tmp1, h; /* T2 Sigma0 */ \ | 125 | addq tmp1, h /* T2 Sigma0 */ _SEP \ |
| 124 | \ | 126 | \ |
| 125 | movq b, tmp2; /* T2 Maj */ \ | 127 | movq b, tmp2 /* T2 Maj */ _SEP \ |
| 126 | xorq c, tmp2; /* T2 Maj */ \ | 128 | xorq c, tmp2 /* T2 Maj */ _SEP \ |
| 127 | andq a, tmp2; /* T2 Maj */ \ | 129 | andq a, tmp2 /* T2 Maj */ _SEP \ |
| 128 | movq b, tmp3; /* T2 Maj */ \ | 130 | movq b, tmp3 /* T2 Maj */ _SEP \ |
| 129 | andq c, tmp3; /* T2 Maj */ \ | 131 | andq c, tmp3 /* T2 Maj */ _SEP \ |
| 130 | xorq tmp2, tmp3; /* T2 Maj */ \ | 132 | xorq tmp2, tmp3 /* T2 Maj */ _SEP \ |
| 131 | addq tmp3, h; /* T2 Maj */ \ | 133 | addq tmp3, h /* T2 Maj */ _SEP \ |
| 132 | \ | 134 | \ |
| 133 | addq $1, round | 135 | addq $1, round |
| 134 | 136 | ||
| 135 | #define sha512_round_load(idx, a, b, c, d, e, f, g, h) \ | 137 | #define sha512_round_load(idx, a, b, c, d, e, f, g, h) \ |
| 136 | sha512_message_schedule_load(idx, in, %rsp, tmp0); \ | 138 | sha512_message_schedule_load(idx, in, %rsp, tmp0) _SEP \ |
| 137 | sha512_round(idx, a, b, c, d, e, f, g, h, k512, %rsp, tmp0) | 139 | sha512_round(idx, a, b, c, d, e, f, g, h, k512, %rsp, tmp0) |
| 138 | 140 | ||
| 139 | #define sha512_round_update(idx, a, b, c, d, e, f, g, h) \ | 141 | #define sha512_round_update(idx, a, b, c, d, e, f, g, h) \ |
| 140 | sha512_message_schedule_update(idx, %rsp, tmp0); \ | 142 | sha512_message_schedule_update(idx, %rsp, tmp0) _SEP \ |
| 141 | sha512_round(idx, a, b, c, d, e, f, g, h, k512, %rsp, tmp0) | 143 | sha512_round(idx, a, b, c, d, e, f, g, h, k512, %rsp, tmp0) |
| 142 | 144 | ||
| 143 | .section .text | 145 | .section .text |
