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authormiod <>2015-11-14 14:53:14 +0000
committermiod <>2015-11-14 14:53:14 +0000
commit5c1fdd8704ef9d12658edf27391ce77b20049406 (patch)
tree92e79af9caccfc48d99025d2b33cb2938be77f99 /src/lib/libcrypto
parent0d9ef8c07288627fc009105ea0b31dfb9072a2c6 (diff)
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mutli -> multi
Diffstat (limited to 'src/lib/libcrypto')
-rwxr-xr-xsrc/lib/libcrypto/sha/asm/sha512-ppc.pl2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/lib/libcrypto/sha/asm/sha512-ppc.pl b/src/lib/libcrypto/sha/asm/sha512-ppc.pl
index f561f313c6..2a7d5a0e8b 100755
--- a/src/lib/libcrypto/sha/asm/sha512-ppc.pl
+++ b/src/lib/libcrypto/sha/asm/sha512-ppc.pl
@@ -20,7 +20,7 @@
20# 20#
21# (*) 64-bit code in 32-bit application context, which actually is 21# (*) 64-bit code in 32-bit application context, which actually is
22# on TODO list. It should be noted that for safe deployment in 22# on TODO list. It should be noted that for safe deployment in
23# 32-bit *mutli-threaded* context asynchronous signals should be 23# 32-bit *multi-threaded* context asynchronous signals should be
24# blocked upon entry to SHA512 block routine. This is because 24# blocked upon entry to SHA512 block routine. This is because
25# 32-bit signaling procedure invalidates upper halves of GPRs. 25# 32-bit signaling procedure invalidates upper halves of GPRs.
26# Context switch procedure preserves them, but not signaling:-( 26# Context switch procedure preserves them, but not signaling:-(