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-rw-r--r--src/lib/libcrypto/arch/i386/Makefile.inc42
-rw-r--r--src/lib/libcrypto/arch/i386/crypto_arch.h46
-rw-r--r--src/lib/libcrypto/arch/i386/crypto_cpu_caps.c120
-rw-r--r--src/lib/libcrypto/arch/i386/opensslconf.h154
4 files changed, 0 insertions, 362 deletions
diff --git a/src/lib/libcrypto/arch/i386/Makefile.inc b/src/lib/libcrypto/arch/i386/Makefile.inc
deleted file mode 100644
index 6989b35686..0000000000
--- a/src/lib/libcrypto/arch/i386/Makefile.inc
+++ /dev/null
@@ -1,42 +0,0 @@
1# $OpenBSD: Makefile.inc,v 1.27 2025/02/14 12:01:58 jsing Exp $
2
3# i386-specific libcrypto build rules
4
5# all i386 code generators use these
6EXTRA_PL = ${LCRYPTO_SRC}/perlasm/x86gas.pl ${LCRYPTO_SRC}/perlasm/x86asm.pl
7
8SRCS += crypto_cpu_caps.c
9
10# aes
11CFLAGS+= -DAES_ASM
12SSLASM+= aes aes-586
13CFLAGS+= -DVPAES_ASM
14SSLASM+= aes vpaes-x86
15SSLASM+= aes aesni-x86
16# bn
17CFLAGS+= -DOPENSSL_IA32_SSE2
18SSLASM+= bn bn-586
19SSLASM+= bn co-586
20CFLAGS+= -DOPENSSL_BN_ASM_MONT
21SSLASM+= bn x86-mont
22# md5
23CFLAGS+= -DMD5_ASM
24SSLASM+= md5 md5-586
25# modes
26CFLAGS+= -DGHASH_ASM
27SSLASM+= modes ghash-x86
28# rc4
29SSLASM+= rc4 rc4-586
30# sha
31SSLASM+= sha sha1-586
32SSLASM+= sha sha256-586
33SSLASM+= sha sha512-586
34
35.for dir f in ${SSLASM}
36SRCS+= ${f}.S
37GENERATED+=${f}.S
38${f}.S: ${LCRYPTO_SRC}/${dir}/asm/${f}.pl ${EXTRA_PL}
39 /usr/bin/perl -I${LCRYPTO_SRC}/perlasm -I${LCRYPTO_SRC}/${dir}/asm \
40 ${LCRYPTO_SRC}/${dir}/asm/${f}.pl \
41 openbsd-elf ${CFLAGS} 386 ${PICFLAG} > ${.TARGET}
42.endfor
diff --git a/src/lib/libcrypto/arch/i386/crypto_arch.h b/src/lib/libcrypto/arch/i386/crypto_arch.h
deleted file mode 100644
index 3df3963d0b..0000000000
--- a/src/lib/libcrypto/arch/i386/crypto_arch.h
+++ /dev/null
@@ -1,46 +0,0 @@
1/* $OpenBSD: crypto_arch.h,v 1.4 2025/02/14 12:01:58 jsing Exp $ */
2/*
3 * Copyright (c) 2024 Joel Sing <jsing@openbsd.org>
4 *
5 * Permission to use, copy, modify, and distribute this software for any
6 * purpose with or without fee is hereby granted, provided that the above
7 * copyright notice and this permission notice appear in all copies.
8 *
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16 */
17
18#ifndef HEADER_CRYPTO_ARCH_H
19#define HEADER_CRYPTO_ARCH_H
20
21#define HAVE_CRYPTO_CPU_CAPS_INIT
22#define HAVE_CRYPTO_CPU_CAPS_IA32
23
24#ifndef OPENSSL_NO_ASM
25
26#define HAVE_AES_CBC_ENCRYPT_INTERNAL
27#define HAVE_AES_SET_ENCRYPT_KEY_INTERNAL
28#define HAVE_AES_SET_DECRYPT_KEY_INTERNAL
29#define HAVE_AES_ENCRYPT_INTERNAL
30#define HAVE_AES_DECRYPT_INTERNAL
31
32#define HAVE_RC4_INTERNAL
33#define HAVE_RC4_SET_KEY_INTERNAL
34
35#define HAVE_SHA1_BLOCK_DATA_ORDER
36#define HAVE_SHA1_BLOCK_GENERIC
37
38#define HAVE_SHA256_BLOCK_DATA_ORDER
39#define HAVE_SHA256_BLOCK_GENERIC
40
41#define HAVE_SHA512_BLOCK_DATA_ORDER
42#define HAVE_SHA512_BLOCK_GENERIC
43
44#endif
45
46#endif
diff --git a/src/lib/libcrypto/arch/i386/crypto_cpu_caps.c b/src/lib/libcrypto/arch/i386/crypto_cpu_caps.c
deleted file mode 100644
index 6bb77411af..0000000000
--- a/src/lib/libcrypto/arch/i386/crypto_cpu_caps.c
+++ /dev/null
@@ -1,120 +0,0 @@
1/* $OpenBSD: crypto_cpu_caps.c,v 1.3 2024/11/12 13:14:57 jsing Exp $ */
2/*
3 * Copyright (c) 2024 Joel Sing <jsing@openbsd.org>
4 *
5 * Permission to use, copy, modify, and distribute this software for any
6 * purpose with or without fee is hereby granted, provided that the above
7 * copyright notice and this permission notice appear in all copies.
8 *
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16 */
17
18#include <stdio.h>
19
20#include <openssl/crypto.h>
21
22#include "x86_arch.h"
23
24/* Legacy architecture specific capabilities, used by perlasm. */
25uint64_t OPENSSL_ia32cap_P;
26
27/* Machine independent CPU capabilities. */
28extern uint64_t crypto_cpu_caps;
29
30static inline void
31cpuid(uint32_t eax, uint32_t *out_eax, uint32_t *out_ebx, uint32_t *out_ecx,
32 uint32_t *out_edx)
33{
34 uint32_t ebx = 0, ecx = 0, edx = 0;
35
36#ifndef OPENSSL_NO_ASM
37 __asm__ ("cpuid": "+a"(eax), "+b"(ebx), "+c"(ecx), "+d"(edx));
38#else
39 eax = 0;
40#endif
41
42 if (out_eax != NULL)
43 *out_eax = eax;
44 if (out_ebx != NULL)
45 *out_ebx = ebx;
46 if (out_ecx != NULL)
47 *out_ecx = ecx;
48 if (out_edx != NULL)
49 *out_edx = edx;
50}
51
52static inline void
53xgetbv(uint32_t ecx, uint32_t *out_eax, uint32_t *out_edx)
54{
55 uint32_t eax = 0, edx = 0;
56
57#ifndef OPENSSL_NO_ASM
58 __asm__ ("xgetbv": "+a"(eax), "+c"(ecx), "+d"(edx));
59#endif
60
61 if (out_eax != NULL)
62 *out_eax = eax;
63 if (out_edx != NULL)
64 *out_edx = edx;
65}
66
67void
68crypto_cpu_caps_init(void)
69{
70 uint32_t eax, ebx, ecx, edx;
71 uint64_t caps = 0;
72
73 cpuid(0, &eax, &ebx, &ecx, &edx);
74
75 /* "GenuineIntel" in little endian. */
76 if (ebx == 0x756e6547 && edx == 0x49656e69 && ecx == 0x6c65746e)
77 caps |= CPUCAP_MASK_INTEL;
78
79 if (eax < 1)
80 return;
81
82 cpuid(1, &eax, &ebx, &ecx, &edx);
83
84 if ((edx & IA32CAP_MASK0_FXSR) != 0)
85 caps |= CPUCAP_MASK_FXSR;
86 if ((edx & IA32CAP_MASK0_HT) != 0)
87 caps |= CPUCAP_MASK_HT;
88 if ((edx & IA32CAP_MASK0_MMX) != 0)
89 caps |= CPUCAP_MASK_MMX;
90 if ((edx & IA32CAP_MASK0_SSE) != 0)
91 caps |= CPUCAP_MASK_SSE;
92 if ((edx & IA32CAP_MASK0_SSE2) != 0)
93 caps |= CPUCAP_MASK_SSE2;
94
95 if ((ecx & IA32CAP_MASK1_AESNI) != 0)
96 caps |= CPUCAP_MASK_AESNI;
97 if ((ecx & IA32CAP_MASK1_PCLMUL) != 0)
98 caps |= CPUCAP_MASK_PCLMUL;
99 if ((ecx & IA32CAP_MASK1_SSSE3) != 0)
100 caps |= CPUCAP_MASK_SSSE3;
101
102 /* AVX requires OSXSAVE and XMM/YMM state to be enabled. */
103 if ((ecx & IA32CAP_MASK1_OSXSAVE) != 0) {
104 xgetbv(0, &eax, NULL);
105 if (((eax >> 1) & 3) == 3 && (ecx & IA32CAP_MASK1_AVX) != 0)
106 caps |= CPUCAP_MASK_AVX;
107 }
108
109 /* Set machine independent CPU capabilities. */
110 if ((caps & CPUCAP_MASK_AESNI) != 0)
111 crypto_cpu_caps |= CRYPTO_CPU_CAPS_ACCELERATED_AES;
112
113 OPENSSL_ia32cap_P = caps;
114}
115
116uint64_t
117crypto_cpu_caps_ia32(void)
118{
119 return OPENSSL_ia32cap_P;
120}
diff --git a/src/lib/libcrypto/arch/i386/opensslconf.h b/src/lib/libcrypto/arch/i386/opensslconf.h
deleted file mode 100644
index 03cf31b940..0000000000
--- a/src/lib/libcrypto/arch/i386/opensslconf.h
+++ /dev/null
@@ -1,154 +0,0 @@
1#include <openssl/opensslfeatures.h>
2/* crypto/opensslconf.h.in */
3
4#if defined(HEADER_CRYPTO_LOCAL_H) && !defined(OPENSSLDIR)
5#define OPENSSLDIR "/etc/ssl"
6#endif
7
8#undef OPENSSL_EXPORT_VAR_AS_FUNCTION
9
10#ifndef OPENSSL_FILE
11#ifdef OPENSSL_NO_FILENAMES
12#define OPENSSL_FILE ""
13#define OPENSSL_LINE 0
14#else
15#define OPENSSL_FILE __FILE__
16#define OPENSSL_LINE __LINE__
17#endif
18#endif
19
20#if defined(HEADER_IDEA_H) && !defined(IDEA_INT)
21#define IDEA_INT unsigned int
22#endif
23
24#if defined(HEADER_MD2_H) && !defined(MD2_INT)
25#define MD2_INT unsigned int
26#endif
27
28#if defined(HEADER_RC2_H) && !defined(RC2_INT)
29/* I need to put in a mod for the alpha - eay */
30#define RC2_INT unsigned int
31#endif
32
33#if defined(HEADER_RC4_H)
34#if !defined(RC4_INT)
35/* using int types make the structure larger but make the code faster
36 * on most boxes I have tested - up to %20 faster. */
37/*
38 * I don't know what does "most" mean, but declaring "int" is a must on:
39 * - Intel P6 because partial register stalls are very expensive;
40 * - elder Alpha because it lacks byte load/store instructions;
41 */
42#define RC4_INT unsigned int
43#endif
44#if !defined(RC4_CHUNK)
45/*
46 * This enables code handling data aligned at natural CPU word
47 * boundary. See crypto/rc4/rc4_enc.c for further details.
48 */
49#undef RC4_CHUNK
50#endif
51#endif
52
53#if (defined(HEADER_NEW_DES_H) || defined(HEADER_DES_H)) && !defined(DES_LONG)
54/* If this is set to 'unsigned int' on a DEC Alpha, this gives about a
55 * %20 speed up (longs are 8 bytes, int's are 4). */
56#ifndef DES_LONG
57#define DES_LONG unsigned long
58#endif
59#endif
60
61#if defined(HEADER_BN_H) && !defined(CONFIG_HEADER_BN_H)
62#define CONFIG_HEADER_BN_H
63#define BN_LLONG
64
65/* Should we define BN_DIV2W here? */
66
67/* Only one for the following should be defined */
68/* The prime number generation stuff may not work when
69 * EIGHT_BIT but I don't care since I've only used this mode
70 * for debugging the bignum libraries */
71#undef SIXTY_FOUR_BIT_LONG
72#undef SIXTY_FOUR_BIT
73#define THIRTY_TWO_BIT
74#undef SIXTEEN_BIT
75#undef EIGHT_BIT
76#endif
77
78#if defined(HEADER_BF_LOCL_H) && !defined(CONFIG_HEADER_BF_LOCL_H)
79#define CONFIG_HEADER_BF_LOCL_H
80#undef BF_PTR
81#endif /* HEADER_BF_LOCL_H */
82
83#if defined(HEADER_DES_LOCL_H) && !defined(CONFIG_HEADER_DES_LOCL_H)
84#define CONFIG_HEADER_DES_LOCL_H
85#ifndef DES_DEFAULT_OPTIONS
86/* the following is tweaked from a config script, that is why it is a
87 * protected undef/define */
88#ifndef DES_PTR
89#define DES_PTR
90#endif
91
92/* This helps C compiler generate the correct code for multiple functional
93 * units. It reduces register dependencies at the expense of 2 more
94 * registers */
95#ifndef DES_RISC1
96#define DES_RISC1
97#endif
98
99#ifndef DES_RISC2
100#undef DES_RISC2
101#endif
102
103#if defined(DES_RISC1) && defined(DES_RISC2)
104YOU SHOULD NOT HAVE BOTH DES_RISC1 AND DES_RISC2 DEFINED!!!!!
105#endif
106
107/* Unroll the inner loop, this sometimes helps, sometimes hinders.
108 * Very much CPU dependent */
109#ifndef DES_UNROLL
110#define DES_UNROLL
111#endif
112
113/* These default values were supplied by
114 * Peter Gutman <pgut001@cs.auckland.ac.nz>
115 * They are only used if nothing else has been defined */
116#if !defined(DES_PTR) && !defined(DES_RISC1) && !defined(DES_RISC2) && !defined(DES_UNROLL)
117/* Special defines which change the way the code is built depending on the
118 CPU and OS. For SGI machines you can use _MIPS_SZLONG (32 or 64) to find
119 even newer MIPS CPU's, but at the moment one size fits all for
120 optimization options. Older Sparc's work better with only UNROLL, but
121 there's no way to tell at compile time what it is you're running on */
122
123#if defined( sun ) /* Newer Sparc's */
124# define DES_PTR
125# define DES_RISC1
126# define DES_UNROLL
127#elif defined( __ultrix ) /* Older MIPS */
128# define DES_PTR
129# define DES_RISC2
130# define DES_UNROLL
131#elif defined( __osf1__ ) /* Alpha */
132# define DES_PTR
133# define DES_RISC2
134#elif defined ( _AIX ) /* RS6000 */
135 /* Unknown */
136#elif defined( __hpux ) /* HP-PA */
137 /* Unknown */
138#elif defined( __aux ) /* 68K */
139 /* Unknown */
140#elif defined( __dgux ) /* 88K (but P6 in latest boxes) */
141# define DES_UNROLL
142#elif defined( __sgi ) /* Newer MIPS */
143# define DES_PTR
144# define DES_RISC2
145# define DES_UNROLL
146#elif defined(i386) || defined(__i386__) /* x86 boxes, should be gcc */
147# define DES_PTR
148# define DES_RISC1
149# define DES_UNROLL
150#endif /* Systems-specific speed defines */
151#endif
152
153#endif /* DES_DEFAULT_OPTIONS */
154#endif /* HEADER_DES_LOCL_H */
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