diff options
Diffstat (limited to 'src/lib/libcrypto/md5/asm')
-rw-r--r-- | src/lib/libcrypto/md5/asm/m5-win32.asm | 55 | ||||
-rw-r--r-- | src/lib/libcrypto/md5/asm/md5-586.pl | 40 | ||||
-rw-r--r-- | src/lib/libcrypto/md5/asm/md5-sparcv9.S | 1029 | ||||
-rw-r--r-- | src/lib/libcrypto/md5/asm/mx86unix.cpp | 730 |
4 files changed, 1078 insertions, 776 deletions
diff --git a/src/lib/libcrypto/md5/asm/m5-win32.asm b/src/lib/libcrypto/md5/asm/m5-win32.asm index c2081da746..51f5f17ca3 100644 --- a/src/lib/libcrypto/md5/asm/m5-win32.asm +++ b/src/lib/libcrypto/md5/asm/m5-win32.asm | |||
@@ -8,15 +8,16 @@ | |||
8 | .386 | 8 | .386 |
9 | .model FLAT | 9 | .model FLAT |
10 | _TEXT SEGMENT | 10 | _TEXT SEGMENT |
11 | PUBLIC _md5_block_x86 | 11 | PUBLIC _md5_block_asm_host_order |
12 | 12 | ||
13 | _md5_block_x86 PROC NEAR | 13 | _md5_block_asm_host_order PROC NEAR |
14 | push esi | 14 | push esi |
15 | push edi | 15 | push edi |
16 | mov edi, DWORD PTR 12[esp] | 16 | mov edi, DWORD PTR 12[esp] |
17 | mov esi, DWORD PTR 16[esp] | 17 | mov esi, DWORD PTR 16[esp] |
18 | mov ecx, DWORD PTR 20[esp] | 18 | mov ecx, DWORD PTR 20[esp] |
19 | push ebp | 19 | push ebp |
20 | shl ecx, 6 | ||
20 | push ebx | 21 | push ebx |
21 | add ecx, esi | 22 | add ecx, esi |
22 | sub ecx, 64 | 23 | sub ecx, 64 |
@@ -34,161 +35,161 @@ L000start: | |||
34 | xor edi, edx | 35 | xor edi, edx |
35 | and edi, ebx | 36 | and edi, ebx |
36 | lea eax, DWORD PTR 3614090360[ebp*1+eax] | 37 | lea eax, DWORD PTR 3614090360[ebp*1+eax] |
37 | mov ebp, DWORD PTR 4[esi] | ||
38 | xor edi, edx | 38 | xor edi, edx |
39 | add eax, edi | 39 | add eax, edi |
40 | mov edi, ebx | 40 | mov edi, ebx |
41 | rol eax, 7 | 41 | rol eax, 7 |
42 | mov ebp, DWORD PTR 4[esi] | ||
42 | add eax, ebx | 43 | add eax, ebx |
43 | ; R0 1 | 44 | ; R0 1 |
44 | xor edi, ecx | 45 | xor edi, ecx |
45 | and edi, eax | 46 | and edi, eax |
46 | lea edx, DWORD PTR 3905402710[ebp*1+edx] | 47 | lea edx, DWORD PTR 3905402710[ebp*1+edx] |
47 | mov ebp, DWORD PTR 8[esi] | ||
48 | xor edi, ecx | 48 | xor edi, ecx |
49 | add edx, edi | 49 | add edx, edi |
50 | mov edi, eax | 50 | mov edi, eax |
51 | rol edx, 12 | 51 | rol edx, 12 |
52 | mov ebp, DWORD PTR 8[esi] | ||
52 | add edx, eax | 53 | add edx, eax |
53 | ; R0 2 | 54 | ; R0 2 |
54 | xor edi, ebx | 55 | xor edi, ebx |
55 | and edi, edx | 56 | and edi, edx |
56 | lea ecx, DWORD PTR 606105819[ebp*1+ecx] | 57 | lea ecx, DWORD PTR 606105819[ebp*1+ecx] |
57 | mov ebp, DWORD PTR 12[esi] | ||
58 | xor edi, ebx | 58 | xor edi, ebx |
59 | add ecx, edi | 59 | add ecx, edi |
60 | mov edi, edx | 60 | mov edi, edx |
61 | rol ecx, 17 | 61 | rol ecx, 17 |
62 | mov ebp, DWORD PTR 12[esi] | ||
62 | add ecx, edx | 63 | add ecx, edx |
63 | ; R0 3 | 64 | ; R0 3 |
64 | xor edi, eax | 65 | xor edi, eax |
65 | and edi, ecx | 66 | and edi, ecx |
66 | lea ebx, DWORD PTR 3250441966[ebp*1+ebx] | 67 | lea ebx, DWORD PTR 3250441966[ebp*1+ebx] |
67 | mov ebp, DWORD PTR 16[esi] | ||
68 | xor edi, eax | 68 | xor edi, eax |
69 | add ebx, edi | 69 | add ebx, edi |
70 | mov edi, ecx | 70 | mov edi, ecx |
71 | rol ebx, 22 | 71 | rol ebx, 22 |
72 | mov ebp, DWORD PTR 16[esi] | ||
72 | add ebx, ecx | 73 | add ebx, ecx |
73 | ; R0 4 | 74 | ; R0 4 |
74 | xor edi, edx | 75 | xor edi, edx |
75 | and edi, ebx | 76 | and edi, ebx |
76 | lea eax, DWORD PTR 4118548399[ebp*1+eax] | 77 | lea eax, DWORD PTR 4118548399[ebp*1+eax] |
77 | mov ebp, DWORD PTR 20[esi] | ||
78 | xor edi, edx | 78 | xor edi, edx |
79 | add eax, edi | 79 | add eax, edi |
80 | mov edi, ebx | 80 | mov edi, ebx |
81 | rol eax, 7 | 81 | rol eax, 7 |
82 | mov ebp, DWORD PTR 20[esi] | ||
82 | add eax, ebx | 83 | add eax, ebx |
83 | ; R0 5 | 84 | ; R0 5 |
84 | xor edi, ecx | 85 | xor edi, ecx |
85 | and edi, eax | 86 | and edi, eax |
86 | lea edx, DWORD PTR 1200080426[ebp*1+edx] | 87 | lea edx, DWORD PTR 1200080426[ebp*1+edx] |
87 | mov ebp, DWORD PTR 24[esi] | ||
88 | xor edi, ecx | 88 | xor edi, ecx |
89 | add edx, edi | 89 | add edx, edi |
90 | mov edi, eax | 90 | mov edi, eax |
91 | rol edx, 12 | 91 | rol edx, 12 |
92 | mov ebp, DWORD PTR 24[esi] | ||
92 | add edx, eax | 93 | add edx, eax |
93 | ; R0 6 | 94 | ; R0 6 |
94 | xor edi, ebx | 95 | xor edi, ebx |
95 | and edi, edx | 96 | and edi, edx |
96 | lea ecx, DWORD PTR 2821735955[ebp*1+ecx] | 97 | lea ecx, DWORD PTR 2821735955[ebp*1+ecx] |
97 | mov ebp, DWORD PTR 28[esi] | ||
98 | xor edi, ebx | 98 | xor edi, ebx |
99 | add ecx, edi | 99 | add ecx, edi |
100 | mov edi, edx | 100 | mov edi, edx |
101 | rol ecx, 17 | 101 | rol ecx, 17 |
102 | mov ebp, DWORD PTR 28[esi] | ||
102 | add ecx, edx | 103 | add ecx, edx |
103 | ; R0 7 | 104 | ; R0 7 |
104 | xor edi, eax | 105 | xor edi, eax |
105 | and edi, ecx | 106 | and edi, ecx |
106 | lea ebx, DWORD PTR 4249261313[ebp*1+ebx] | 107 | lea ebx, DWORD PTR 4249261313[ebp*1+ebx] |
107 | mov ebp, DWORD PTR 32[esi] | ||
108 | xor edi, eax | 108 | xor edi, eax |
109 | add ebx, edi | 109 | add ebx, edi |
110 | mov edi, ecx | 110 | mov edi, ecx |
111 | rol ebx, 22 | 111 | rol ebx, 22 |
112 | mov ebp, DWORD PTR 32[esi] | ||
112 | add ebx, ecx | 113 | add ebx, ecx |
113 | ; R0 8 | 114 | ; R0 8 |
114 | xor edi, edx | 115 | xor edi, edx |
115 | and edi, ebx | 116 | and edi, ebx |
116 | lea eax, DWORD PTR 1770035416[ebp*1+eax] | 117 | lea eax, DWORD PTR 1770035416[ebp*1+eax] |
117 | mov ebp, DWORD PTR 36[esi] | ||
118 | xor edi, edx | 118 | xor edi, edx |
119 | add eax, edi | 119 | add eax, edi |
120 | mov edi, ebx | 120 | mov edi, ebx |
121 | rol eax, 7 | 121 | rol eax, 7 |
122 | mov ebp, DWORD PTR 36[esi] | ||
122 | add eax, ebx | 123 | add eax, ebx |
123 | ; R0 9 | 124 | ; R0 9 |
124 | xor edi, ecx | 125 | xor edi, ecx |
125 | and edi, eax | 126 | and edi, eax |
126 | lea edx, DWORD PTR 2336552879[ebp*1+edx] | 127 | lea edx, DWORD PTR 2336552879[ebp*1+edx] |
127 | mov ebp, DWORD PTR 40[esi] | ||
128 | xor edi, ecx | 128 | xor edi, ecx |
129 | add edx, edi | 129 | add edx, edi |
130 | mov edi, eax | 130 | mov edi, eax |
131 | rol edx, 12 | 131 | rol edx, 12 |
132 | mov ebp, DWORD PTR 40[esi] | ||
132 | add edx, eax | 133 | add edx, eax |
133 | ; R0 10 | 134 | ; R0 10 |
134 | xor edi, ebx | 135 | xor edi, ebx |
135 | and edi, edx | 136 | and edi, edx |
136 | lea ecx, DWORD PTR 4294925233[ebp*1+ecx] | 137 | lea ecx, DWORD PTR 4294925233[ebp*1+ecx] |
137 | mov ebp, DWORD PTR 44[esi] | ||
138 | xor edi, ebx | 138 | xor edi, ebx |
139 | add ecx, edi | 139 | add ecx, edi |
140 | mov edi, edx | 140 | mov edi, edx |
141 | rol ecx, 17 | 141 | rol ecx, 17 |
142 | mov ebp, DWORD PTR 44[esi] | ||
142 | add ecx, edx | 143 | add ecx, edx |
143 | ; R0 11 | 144 | ; R0 11 |
144 | xor edi, eax | 145 | xor edi, eax |
145 | and edi, ecx | 146 | and edi, ecx |
146 | lea ebx, DWORD PTR 2304563134[ebp*1+ebx] | 147 | lea ebx, DWORD PTR 2304563134[ebp*1+ebx] |
147 | mov ebp, DWORD PTR 48[esi] | ||
148 | xor edi, eax | 148 | xor edi, eax |
149 | add ebx, edi | 149 | add ebx, edi |
150 | mov edi, ecx | 150 | mov edi, ecx |
151 | rol ebx, 22 | 151 | rol ebx, 22 |
152 | mov ebp, DWORD PTR 48[esi] | ||
152 | add ebx, ecx | 153 | add ebx, ecx |
153 | ; R0 12 | 154 | ; R0 12 |
154 | xor edi, edx | 155 | xor edi, edx |
155 | and edi, ebx | 156 | and edi, ebx |
156 | lea eax, DWORD PTR 1804603682[ebp*1+eax] | 157 | lea eax, DWORD PTR 1804603682[ebp*1+eax] |
157 | mov ebp, DWORD PTR 52[esi] | ||
158 | xor edi, edx | 158 | xor edi, edx |
159 | add eax, edi | 159 | add eax, edi |
160 | mov edi, ebx | 160 | mov edi, ebx |
161 | rol eax, 7 | 161 | rol eax, 7 |
162 | mov ebp, DWORD PTR 52[esi] | ||
162 | add eax, ebx | 163 | add eax, ebx |
163 | ; R0 13 | 164 | ; R0 13 |
164 | xor edi, ecx | 165 | xor edi, ecx |
165 | and edi, eax | 166 | and edi, eax |
166 | lea edx, DWORD PTR 4254626195[ebp*1+edx] | 167 | lea edx, DWORD PTR 4254626195[ebp*1+edx] |
167 | mov ebp, DWORD PTR 56[esi] | ||
168 | xor edi, ecx | 168 | xor edi, ecx |
169 | add edx, edi | 169 | add edx, edi |
170 | mov edi, eax | 170 | mov edi, eax |
171 | rol edx, 12 | 171 | rol edx, 12 |
172 | mov ebp, DWORD PTR 56[esi] | ||
172 | add edx, eax | 173 | add edx, eax |
173 | ; R0 14 | 174 | ; R0 14 |
174 | xor edi, ebx | 175 | xor edi, ebx |
175 | and edi, edx | 176 | and edi, edx |
176 | lea ecx, DWORD PTR 2792965006[ebp*1+ecx] | 177 | lea ecx, DWORD PTR 2792965006[ebp*1+ecx] |
177 | mov ebp, DWORD PTR 60[esi] | ||
178 | xor edi, ebx | 178 | xor edi, ebx |
179 | add ecx, edi | 179 | add ecx, edi |
180 | mov edi, edx | 180 | mov edi, edx |
181 | rol ecx, 17 | 181 | rol ecx, 17 |
182 | mov ebp, DWORD PTR 60[esi] | ||
182 | add ecx, edx | 183 | add ecx, edx |
183 | ; R0 15 | 184 | ; R0 15 |
184 | xor edi, eax | 185 | xor edi, eax |
185 | and edi, ecx | 186 | and edi, ecx |
186 | lea ebx, DWORD PTR 1236535329[ebp*1+ebx] | 187 | lea ebx, DWORD PTR 1236535329[ebp*1+ebx] |
187 | mov ebp, DWORD PTR 4[esi] | ||
188 | xor edi, eax | 188 | xor edi, eax |
189 | add ebx, edi | 189 | add ebx, edi |
190 | mov edi, ecx | 190 | mov edi, ecx |
191 | rol ebx, 22 | 191 | rol ebx, 22 |
192 | mov ebp, DWORD PTR 4[esi] | ||
192 | add ebx, ecx | 193 | add ebx, ecx |
193 | ; | 194 | ; |
194 | ; R1 section | 195 | ; R1 section |
@@ -359,8 +360,8 @@ L000start: | |||
359 | xor edi, ebx | 360 | xor edi, ebx |
360 | lea eax, DWORD PTR 4294588738[ebp*1+eax] | 361 | lea eax, DWORD PTR 4294588738[ebp*1+eax] |
361 | add eax, edi | 362 | add eax, edi |
362 | mov ebp, DWORD PTR 32[esi] | ||
363 | rol eax, 4 | 363 | rol eax, 4 |
364 | mov ebp, DWORD PTR 32[esi] | ||
364 | mov edi, ebx | 365 | mov edi, ebx |
365 | ; R2 33 | 366 | ; R2 33 |
366 | lea edx, DWORD PTR 2272392833[ebp*1+edx] | 367 | lea edx, DWORD PTR 2272392833[ebp*1+edx] |
@@ -377,8 +378,8 @@ L000start: | |||
377 | xor edi, edx | 378 | xor edi, edx |
378 | lea ecx, DWORD PTR 1839030562[ebp*1+ecx] | 379 | lea ecx, DWORD PTR 1839030562[ebp*1+ecx] |
379 | add ecx, edi | 380 | add ecx, edi |
380 | mov ebp, DWORD PTR 56[esi] | ||
381 | rol ecx, 16 | 381 | rol ecx, 16 |
382 | mov ebp, DWORD PTR 56[esi] | ||
382 | mov edi, edx | 383 | mov edi, edx |
383 | ; R2 35 | 384 | ; R2 35 |
384 | lea ebx, DWORD PTR 4259657740[ebp*1+ebx] | 385 | lea ebx, DWORD PTR 4259657740[ebp*1+ebx] |
@@ -395,8 +396,8 @@ L000start: | |||
395 | xor edi, ebx | 396 | xor edi, ebx |
396 | lea eax, DWORD PTR 2763975236[ebp*1+eax] | 397 | lea eax, DWORD PTR 2763975236[ebp*1+eax] |
397 | add eax, edi | 398 | add eax, edi |
398 | mov ebp, DWORD PTR 16[esi] | ||
399 | rol eax, 4 | 399 | rol eax, 4 |
400 | mov ebp, DWORD PTR 16[esi] | ||
400 | mov edi, ebx | 401 | mov edi, ebx |
401 | ; R2 37 | 402 | ; R2 37 |
402 | lea edx, DWORD PTR 1272893353[ebp*1+edx] | 403 | lea edx, DWORD PTR 1272893353[ebp*1+edx] |
@@ -413,8 +414,8 @@ L000start: | |||
413 | xor edi, edx | 414 | xor edi, edx |
414 | lea ecx, DWORD PTR 4139469664[ebp*1+ecx] | 415 | lea ecx, DWORD PTR 4139469664[ebp*1+ecx] |
415 | add ecx, edi | 416 | add ecx, edi |
416 | mov ebp, DWORD PTR 40[esi] | ||
417 | rol ecx, 16 | 417 | rol ecx, 16 |
418 | mov ebp, DWORD PTR 40[esi] | ||
418 | mov edi, edx | 419 | mov edi, edx |
419 | ; R2 39 | 420 | ; R2 39 |
420 | lea ebx, DWORD PTR 3200236656[ebp*1+ebx] | 421 | lea ebx, DWORD PTR 3200236656[ebp*1+ebx] |
@@ -431,8 +432,8 @@ L000start: | |||
431 | xor edi, ebx | 432 | xor edi, ebx |
432 | lea eax, DWORD PTR 681279174[ebp*1+eax] | 433 | lea eax, DWORD PTR 681279174[ebp*1+eax] |
433 | add eax, edi | 434 | add eax, edi |
434 | mov ebp, DWORD PTR [esi] | ||
435 | rol eax, 4 | 435 | rol eax, 4 |
436 | mov ebp, DWORD PTR [esi] | ||
436 | mov edi, ebx | 437 | mov edi, ebx |
437 | ; R2 41 | 438 | ; R2 41 |
438 | lea edx, DWORD PTR 3936430074[ebp*1+edx] | 439 | lea edx, DWORD PTR 3936430074[ebp*1+edx] |
@@ -449,8 +450,8 @@ L000start: | |||
449 | xor edi, edx | 450 | xor edi, edx |
450 | lea ecx, DWORD PTR 3572445317[ebp*1+ecx] | 451 | lea ecx, DWORD PTR 3572445317[ebp*1+ecx] |
451 | add ecx, edi | 452 | add ecx, edi |
452 | mov ebp, DWORD PTR 24[esi] | ||
453 | rol ecx, 16 | 453 | rol ecx, 16 |
454 | mov ebp, DWORD PTR 24[esi] | ||
454 | mov edi, edx | 455 | mov edi, edx |
455 | ; R2 43 | 456 | ; R2 43 |
456 | lea ebx, DWORD PTR 76029189[ebp*1+ebx] | 457 | lea ebx, DWORD PTR 76029189[ebp*1+ebx] |
@@ -467,8 +468,8 @@ L000start: | |||
467 | xor edi, ebx | 468 | xor edi, ebx |
468 | lea eax, DWORD PTR 3654602809[ebp*1+eax] | 469 | lea eax, DWORD PTR 3654602809[ebp*1+eax] |
469 | add eax, edi | 470 | add eax, edi |
470 | mov ebp, DWORD PTR 48[esi] | ||
471 | rol eax, 4 | 471 | rol eax, 4 |
472 | mov ebp, DWORD PTR 48[esi] | ||
472 | mov edi, ebx | 473 | mov edi, ebx |
473 | ; R2 45 | 474 | ; R2 45 |
474 | lea edx, DWORD PTR 3873151461[ebp*1+edx] | 475 | lea edx, DWORD PTR 3873151461[ebp*1+edx] |
@@ -485,8 +486,8 @@ L000start: | |||
485 | xor edi, edx | 486 | xor edi, edx |
486 | lea ecx, DWORD PTR 530742520[ebp*1+ecx] | 487 | lea ecx, DWORD PTR 530742520[ebp*1+ecx] |
487 | add ecx, edi | 488 | add ecx, edi |
488 | mov ebp, DWORD PTR 8[esi] | ||
489 | rol ecx, 16 | 489 | rol ecx, 16 |
490 | mov ebp, DWORD PTR 8[esi] | ||
490 | mov edi, edx | 491 | mov edi, edx |
491 | ; R2 47 | 492 | ; R2 47 |
492 | lea ebx, DWORD PTR 3299628645[ebp*1+ebx] | 493 | lea ebx, DWORD PTR 3299628645[ebp*1+ebx] |
@@ -681,6 +682,6 @@ L000start: | |||
681 | pop edi | 682 | pop edi |
682 | pop esi | 683 | pop esi |
683 | ret | 684 | ret |
684 | _md5_block_x86 ENDP | 685 | _md5_block_asm_host_order ENDP |
685 | _TEXT ENDS | 686 | _TEXT ENDS |
686 | END | 687 | END |
diff --git a/src/lib/libcrypto/md5/asm/md5-586.pl b/src/lib/libcrypto/md5/asm/md5-586.pl index 2c7fb7dd98..5fc6a205ce 100644 --- a/src/lib/libcrypto/md5/asm/md5-586.pl +++ b/src/lib/libcrypto/md5/asm/md5-586.pl | |||
@@ -1,4 +1,4 @@ | |||
1 | #!/usr/bin/perl | 1 | #!/usr/local/bin/perl |
2 | 2 | ||
3 | # Normal is the | 3 | # Normal is the |
4 | # md5_block_x86(MD5_CTX *c, ULONG *X); | 4 | # md5_block_x86(MD5_CTX *c, ULONG *X); |
@@ -29,7 +29,7 @@ $X="esi"; | |||
29 | 0, 7, 14, 5, 12, 3, 10, 1, 8, 15, 6, 13, 4, 11, 2, 9, # R3 | 29 | 0, 7, 14, 5, 12, 3, 10, 1, 8, 15, 6, 13, 4, 11, 2, 9, # R3 |
30 | ); | 30 | ); |
31 | 31 | ||
32 | &md5_block("md5_block_x86"); | 32 | &md5_block("md5_block_asm_host_order"); |
33 | &asm_finish(); | 33 | &asm_finish(); |
34 | 34 | ||
35 | sub Np | 35 | sub Np |
@@ -44,7 +44,7 @@ sub R0 | |||
44 | local($pos,$a,$b,$c,$d,$K,$ki,$s,$t)=@_; | 44 | local($pos,$a,$b,$c,$d,$K,$ki,$s,$t)=@_; |
45 | 45 | ||
46 | &mov($tmp1,$C) if $pos < 0; | 46 | &mov($tmp1,$C) if $pos < 0; |
47 | &mov($tmp2,&DWP($xo[$ki]*4,$K,"",0)) if $pos < 0; # very first one | 47 | &mov($tmp2,&DWP($xo[$ki]*4,$K,"",0)) if $pos < 0; # very first one |
48 | 48 | ||
49 | # body proper | 49 | # body proper |
50 | 50 | ||
@@ -54,7 +54,6 @@ sub R0 | |||
54 | &and($tmp1,$b); # F function - part 3 | 54 | &and($tmp1,$b); # F function - part 3 |
55 | &lea($a,&DWP($t,$a,$tmp2,1)); | 55 | &lea($a,&DWP($t,$a,$tmp2,1)); |
56 | 56 | ||
57 | &mov($tmp2,&DWP($xo[$ki+1]*4,$K,"",0)) if ($pos != 2); | ||
58 | &xor($tmp1,$d); # F function - part 4 | 57 | &xor($tmp1,$d); # F function - part 4 |
59 | 58 | ||
60 | &add($a,$tmp1); | 59 | &add($a,$tmp1); |
@@ -62,8 +61,10 @@ sub R0 | |||
62 | &mov($tmp1,&Np($c)) if $pos == 1; # next tmp1 for R1 | 61 | &mov($tmp1,&Np($c)) if $pos == 1; # next tmp1 for R1 |
63 | 62 | ||
64 | &rotl($a,$s); | 63 | &rotl($a,$s); |
65 | &add($a,$b); | ||
66 | 64 | ||
65 | &mov($tmp2,&DWP($xo[$ki+1]*4,$K,"",0)) if ($pos != 2); | ||
66 | |||
67 | &add($a,$b); | ||
67 | } | 68 | } |
68 | 69 | ||
69 | sub R1 | 70 | sub R1 |
@@ -100,16 +101,16 @@ if (($n & 1) == 0) | |||
100 | # make sure to do 'D' first, not 'B', else we clash with | 101 | # make sure to do 'D' first, not 'B', else we clash with |
101 | # the last add from the previous round. | 102 | # the last add from the previous round. |
102 | 103 | ||
103 | &xor($tmp1,$d); # H function - part 2 | 104 | &xor($tmp1,$d); # H function - part 2 |
104 | 105 | ||
105 | &xor($tmp1,$b); # H function - part 3 | 106 | &xor($tmp1,$b); # H function - part 3 |
106 | &lea($a,&DWP($t,$a,$tmp2,1)); | 107 | &lea($a,&DWP($t,$a,$tmp2,1)); |
107 | 108 | ||
108 | &add($a,$tmp1); | 109 | &add($a,$tmp1); |
109 | &mov($tmp2,&DWP($xo[$ki+1]*4,$K,"",0)); | ||
110 | 110 | ||
111 | &rotl($a,$s); | 111 | &rotl($a,$s); |
112 | 112 | ||
113 | &mov($tmp2,&DWP($xo[$ki+1]*4,$K,"",0)); | ||
113 | &mov($tmp1,&Np($c)); | 114 | &mov($tmp1,&Np($c)); |
114 | } | 115 | } |
115 | else | 116 | else |
@@ -118,17 +119,17 @@ else | |||
118 | # make sure to do 'D' first, not 'B', else we clash with | 119 | # make sure to do 'D' first, not 'B', else we clash with |
119 | # the last add from the previous round. | 120 | # the last add from the previous round. |
120 | 121 | ||
121 | &lea($a,&DWP($t,$a,$tmp2,1)); | 122 | &lea($a,&DWP($t,$a,$tmp2,1)); |
122 | 123 | ||
123 | &add($b,$c); # MOVED FORWARD | 124 | &add($b,$c); # MOVED FORWARD |
124 | &xor($tmp1,$d); # H function - part 2 | 125 | &xor($tmp1,$d); # H function - part 2 |
125 | 126 | ||
126 | &xor($tmp1,$b); # H function - part 3 | 127 | &xor($tmp1,$b); # H function - part 3 |
127 | &mov($tmp2,&DWP($xo[$ki+1]*4,$K,"",0)) if ($pos != 2); | 128 | &mov($tmp2,&DWP($xo[$ki+1]*4,$K,"",0)) if ($pos != 2); |
128 | 129 | ||
129 | &add($a,$tmp1); | 130 | &add($a,$tmp1); |
130 | &mov($tmp1,&Np($c)) if $pos < 1; # H function - part 1 | 131 | &mov($tmp1,&Np($c)) if $pos < 1; # H function - part 1 |
131 | &mov($tmp1,-1) if $pos == 1; # I function - part 1 | 132 | &mov($tmp1,-1) if $pos == 1; # I function - part 1 |
132 | 133 | ||
133 | &rotl($a,$s); | 134 | &rotl($a,$s); |
134 | 135 | ||
@@ -146,21 +147,21 @@ sub R3 | |||
146 | &xor($tmp1,$d) if $pos < 0; # I function - part 2 | 147 | &xor($tmp1,$d) if $pos < 0; # I function - part 2 |
147 | 148 | ||
148 | &or($tmp1,$b); # I function - part 3 | 149 | &or($tmp1,$b); # I function - part 3 |
149 | &lea($a,&DWP($t,$a,$tmp2,1)); | 150 | &lea($a,&DWP($t,$a,$tmp2,1)); |
150 | 151 | ||
151 | &xor($tmp1,$c); # I function - part 4 | 152 | &xor($tmp1,$c); # I function - part 4 |
152 | &mov($tmp2,&DWP($xo[$ki+1]*4,$K,"",0)) if $pos != 2; # load X/k value | 153 | &mov($tmp2,&DWP($xo[$ki+1]*4,$K,"",0)) if $pos != 2; # load X/k value |
153 | &mov($tmp2,&wparam(0)) if $pos == 2; | 154 | &mov($tmp2,&wparam(0)) if $pos == 2; |
154 | 155 | ||
155 | &add($a,$tmp1); | 156 | &add($a,$tmp1); |
156 | &mov($tmp1,-1) if $pos < 1; # H function - part 1 | 157 | &mov($tmp1,-1) if $pos < 1; # H function - part 1 |
157 | &add($K,64) if $pos >=1 && !$normal; | 158 | &add($K,64) if $pos >=1 && !$normal; |
158 | 159 | ||
159 | &rotl($a,$s); | 160 | &rotl($a,$s); |
160 | 161 | ||
161 | &xor($tmp1,&Np($d)) if $pos <= 0; # I function - part = first time | 162 | &xor($tmp1,&Np($d)) if $pos <= 0; # I function - part = first time |
162 | &mov($tmp1,&DWP( 0,$tmp2,"",0)) if $pos > 0; | 163 | &mov($tmp1,&DWP( 0,$tmp2,"",0)) if $pos > 0; |
163 | &add($a,$b); | 164 | &add($a,$b); |
164 | } | 165 | } |
165 | 166 | ||
166 | 167 | ||
@@ -182,6 +183,7 @@ sub md5_block | |||
182 | &mov($X, &wparam(1)); # esi | 183 | &mov($X, &wparam(1)); # esi |
183 | &mov($C, &wparam(2)); | 184 | &mov($C, &wparam(2)); |
184 | &push("ebp"); | 185 | &push("ebp"); |
186 | &shl($C, 6); | ||
185 | &push("ebx"); | 187 | &push("ebx"); |
186 | &add($C, $X); # offset we end at | 188 | &add($C, $X); # offset we end at |
187 | &sub($C, 64); | 189 | &sub($C, 64); |
diff --git a/src/lib/libcrypto/md5/asm/md5-sparcv9.S b/src/lib/libcrypto/md5/asm/md5-sparcv9.S new file mode 100644 index 0000000000..ca4257f134 --- /dev/null +++ b/src/lib/libcrypto/md5/asm/md5-sparcv9.S | |||
@@ -0,0 +1,1029 @@ | |||
1 | .ident "md5-sparcv9.S, Version 1.0" | ||
2 | .ident "SPARC V9 ISA artwork by Andy Polyakov <appro@fy.chalmers.se>" | ||
3 | .file "md5-sparcv9.S" | ||
4 | |||
5 | /* | ||
6 | * ==================================================================== | ||
7 | * Copyright (c) 1999 Andy Polyakov <appro@fy.chalmers.se>. | ||
8 | * | ||
9 | * Rights for redistribution and usage in source and binary forms are | ||
10 | * granted as long as above copyright notices are retained. Warranty | ||
11 | * of any kind is (of course:-) disclaimed. | ||
12 | * ==================================================================== | ||
13 | */ | ||
14 | |||
15 | /* | ||
16 | * This is my modest contribution to OpenSSL project (see | ||
17 | * http://www.openssl.org/ for more information about it) and is an | ||
18 | * assembler implementation of MD5 block hash function. I've hand-coded | ||
19 | * this for the sole reason to reach UltraSPARC-specific "load in | ||
20 | * little-endian byte order" instruction. This gives up to 15% | ||
21 | * performance improvement for cases when input message is aligned at | ||
22 | * 32 bits boundary. The module was tested under both 32 *and* 64 bit | ||
23 | * kernels. For updates see http://fy.chalmers.se/~appro/hpe/. | ||
24 | * | ||
25 | * To compile with SC4.x/SC5.x: | ||
26 | * | ||
27 | * cc -xarch=v[9|8plus] -DULTRASPARC -DMD5_BLOCK_DATA_ORDER \ | ||
28 | * -c md5-sparcv9.S | ||
29 | * | ||
30 | * and with gcc: | ||
31 | * | ||
32 | * gcc -mcpu=ultrasparc -DULTRASPARC -DMD5_BLOCK_DATA_ORDER \ | ||
33 | * -c md5-sparcv9.S | ||
34 | * | ||
35 | * or if above fails (it does if you have gas): | ||
36 | * | ||
37 | * gcc -E -DULTRASPARC -DMD5_BLOCK_DATA_ORDER md5_block.sparc.S | \ | ||
38 | * as -xarch=v8plus /dev/fd/0 -o md5-sparcv9.o | ||
39 | */ | ||
40 | |||
41 | #define A %o0 | ||
42 | #define B %o1 | ||
43 | #define C %o2 | ||
44 | #define D %o3 | ||
45 | #define T1 %o4 | ||
46 | #define T2 %o5 | ||
47 | |||
48 | #define R0 %l0 | ||
49 | #define R1 %l1 | ||
50 | #define R2 %l2 | ||
51 | #define R3 %l3 | ||
52 | #define R4 %l4 | ||
53 | #define R5 %l5 | ||
54 | #define R6 %l6 | ||
55 | #define R7 %l7 | ||
56 | #define R8 %i3 | ||
57 | #define R9 %i4 | ||
58 | #define R10 %i5 | ||
59 | #define R11 %g1 | ||
60 | #define R12 %g2 | ||
61 | #define R13 %g3 | ||
62 | #define RX %g4 | ||
63 | |||
64 | #define Aptr %i0+0 | ||
65 | #define Bptr %i0+4 | ||
66 | #define Cptr %i0+8 | ||
67 | #define Dptr %i0+12 | ||
68 | |||
69 | #define Aval R5 /* those not used at the end of the last round */ | ||
70 | #define Bval R6 | ||
71 | #define Cval R7 | ||
72 | #define Dval R8 | ||
73 | |||
74 | #if defined(MD5_BLOCK_DATA_ORDER) | ||
75 | # if defined(ULTRASPARC) | ||
76 | # define LOAD lda | ||
77 | # define X(i) [%i1+i*4]%asi | ||
78 | # define md5_block md5_block_asm_data_order_aligned | ||
79 | # define ASI_PRIMARY_LITTLE 0x88 | ||
80 | # else | ||
81 | # error "MD5_BLOCK_DATA_ORDER is supported only on UltraSPARC!" | ||
82 | # endif | ||
83 | #else | ||
84 | # define LOAD ld | ||
85 | # define X(i) [%i1+i*4] | ||
86 | # define md5_block md5_block_asm_host_order | ||
87 | #endif | ||
88 | |||
89 | .section ".text",#alloc,#execinstr | ||
90 | |||
91 | #if defined(__SUNPRO_C) && defined(__sparcv9) | ||
92 | /* They've said -xarch=v9 at command line */ | ||
93 | .register %g2,#scratch | ||
94 | .register %g3,#scratch | ||
95 | # define FRAME -192 | ||
96 | #elif defined(__GNUC__) && defined(__arch64__) | ||
97 | /* They've said -m64 at command line */ | ||
98 | .register %g2,#scratch | ||
99 | .register %g3,#scratch | ||
100 | # define FRAME -192 | ||
101 | #else | ||
102 | # define FRAME -96 | ||
103 | #endif | ||
104 | |||
105 | .align 32 | ||
106 | |||
107 | .global md5_block | ||
108 | md5_block: | ||
109 | save %sp,FRAME,%sp | ||
110 | |||
111 | ld [Dptr],D | ||
112 | ld [Cptr],C | ||
113 | ld [Bptr],B | ||
114 | ld [Aptr],A | ||
115 | #ifdef ASI_PRIMARY_LITTLE | ||
116 | rd %asi,%o7 ! How dare I? Well, I just do:-) | ||
117 | wr %g0,ASI_PRIMARY_LITTLE,%asi | ||
118 | #endif | ||
119 | LOAD X(0),R0 | ||
120 | |||
121 | .Lmd5_block_loop: | ||
122 | |||
123 | !!!!!!!!Round 0 | ||
124 | |||
125 | xor C,D,T1 | ||
126 | sethi %hi(0xd76aa478),T2 | ||
127 | and T1,B,T1 | ||
128 | or T2,%lo(0xd76aa478),T2 != | ||
129 | xor T1,D,T1 | ||
130 | add T1,R0,T1 | ||
131 | LOAD X(1),R1 | ||
132 | add T1,T2,T1 != | ||
133 | add A,T1,A | ||
134 | sll A,7,T2 | ||
135 | srl A,32-7,A | ||
136 | or A,T2,A != | ||
137 | xor B,C,T1 | ||
138 | add A,B,A | ||
139 | |||
140 | sethi %hi(0xe8c7b756),T2 | ||
141 | and T1,A,T1 != | ||
142 | or T2,%lo(0xe8c7b756),T2 | ||
143 | xor T1,C,T1 | ||
144 | LOAD X(2),R2 | ||
145 | add T1,R1,T1 != | ||
146 | add T1,T2,T1 | ||
147 | add D,T1,D | ||
148 | sll D,12,T2 | ||
149 | srl D,32-12,D != | ||
150 | or D,T2,D | ||
151 | xor A,B,T1 | ||
152 | add D,A,D | ||
153 | |||
154 | sethi %hi(0x242070db),T2 != | ||
155 | and T1,D,T1 | ||
156 | or T2,%lo(0x242070db),T2 | ||
157 | xor T1,B,T1 | ||
158 | add T1,R2,T1 != | ||
159 | LOAD X(3),R3 | ||
160 | add T1,T2,T1 | ||
161 | add C,T1,C | ||
162 | sll C,17,T2 != | ||
163 | srl C,32-17,C | ||
164 | or C,T2,C | ||
165 | xor D,A,T1 | ||
166 | add C,D,C != | ||
167 | |||
168 | sethi %hi(0xc1bdceee),T2 | ||
169 | and T1,C,T1 | ||
170 | or T2,%lo(0xc1bdceee),T2 | ||
171 | xor T1,A,T1 != | ||
172 | add T1,R3,T1 | ||
173 | LOAD X(4),R4 | ||
174 | add T1,T2,T1 | ||
175 | add B,T1,B != | ||
176 | sll B,22,T2 | ||
177 | srl B,32-22,B | ||
178 | or B,T2,B | ||
179 | xor C,D,T1 != | ||
180 | add B,C,B | ||
181 | |||
182 | sethi %hi(0xf57c0faf),T2 | ||
183 | and T1,B,T1 | ||
184 | or T2,%lo(0xf57c0faf),T2 != | ||
185 | xor T1,D,T1 | ||
186 | add T1,R4,T1 | ||
187 | LOAD X(5),R5 | ||
188 | add T1,T2,T1 != | ||
189 | add A,T1,A | ||
190 | sll A,7,T2 | ||
191 | srl A,32-7,A | ||
192 | or A,T2,A != | ||
193 | xor B,C,T1 | ||
194 | add A,B,A | ||
195 | |||
196 | sethi %hi(0x4787c62a),T2 | ||
197 | and T1,A,T1 != | ||
198 | or T2,%lo(0x4787c62a),T2 | ||
199 | xor T1,C,T1 | ||
200 | LOAD X(6),R6 | ||
201 | add T1,R5,T1 != | ||
202 | add T1,T2,T1 | ||
203 | add D,T1,D | ||
204 | sll D,12,T2 | ||
205 | srl D,32-12,D != | ||
206 | or D,T2,D | ||
207 | xor A,B,T1 | ||
208 | add D,A,D | ||
209 | |||
210 | sethi %hi(0xa8304613),T2 != | ||
211 | and T1,D,T1 | ||
212 | or T2,%lo(0xa8304613),T2 | ||
213 | xor T1,B,T1 | ||
214 | add T1,R6,T1 != | ||
215 | LOAD X(7),R7 | ||
216 | add T1,T2,T1 | ||
217 | add C,T1,C | ||
218 | sll C,17,T2 != | ||
219 | srl C,32-17,C | ||
220 | or C,T2,C | ||
221 | xor D,A,T1 | ||
222 | add C,D,C != | ||
223 | |||
224 | sethi %hi(0xfd469501),T2 | ||
225 | and T1,C,T1 | ||
226 | or T2,%lo(0xfd469501),T2 | ||
227 | xor T1,A,T1 != | ||
228 | add T1,R7,T1 | ||
229 | LOAD X(8),R8 | ||
230 | add T1,T2,T1 | ||
231 | add B,T1,B != | ||
232 | sll B,22,T2 | ||
233 | srl B,32-22,B | ||
234 | or B,T2,B | ||
235 | xor C,D,T1 != | ||
236 | add B,C,B | ||
237 | |||
238 | sethi %hi(0x698098d8),T2 | ||
239 | and T1,B,T1 | ||
240 | or T2,%lo(0x698098d8),T2 != | ||
241 | xor T1,D,T1 | ||
242 | add T1,R8,T1 | ||
243 | LOAD X(9),R9 | ||
244 | add T1,T2,T1 != | ||
245 | add A,T1,A | ||
246 | sll A,7,T2 | ||
247 | srl A,32-7,A | ||
248 | or A,T2,A != | ||
249 | xor B,C,T1 | ||
250 | add A,B,A | ||
251 | |||
252 | sethi %hi(0x8b44f7af),T2 | ||
253 | and T1,A,T1 != | ||
254 | or T2,%lo(0x8b44f7af),T2 | ||
255 | xor T1,C,T1 | ||
256 | LOAD X(10),R10 | ||
257 | add T1,R9,T1 != | ||
258 | add T1,T2,T1 | ||
259 | add D,T1,D | ||
260 | sll D,12,T2 | ||
261 | srl D,32-12,D != | ||
262 | or D,T2,D | ||
263 | xor A,B,T1 | ||
264 | add D,A,D | ||
265 | |||
266 | sethi %hi(0xffff5bb1),T2 != | ||
267 | and T1,D,T1 | ||
268 | or T2,%lo(0xffff5bb1),T2 | ||
269 | xor T1,B,T1 | ||
270 | add T1,R10,T1 != | ||
271 | LOAD X(11),R11 | ||
272 | add T1,T2,T1 | ||
273 | add C,T1,C | ||
274 | sll C,17,T2 != | ||
275 | srl C,32-17,C | ||
276 | or C,T2,C | ||
277 | xor D,A,T1 | ||
278 | add C,D,C != | ||
279 | |||
280 | sethi %hi(0x895cd7be),T2 | ||
281 | and T1,C,T1 | ||
282 | or T2,%lo(0x895cd7be),T2 | ||
283 | xor T1,A,T1 != | ||
284 | add T1,R11,T1 | ||
285 | LOAD X(12),R12 | ||
286 | add T1,T2,T1 | ||
287 | add B,T1,B != | ||
288 | sll B,22,T2 | ||
289 | srl B,32-22,B | ||
290 | or B,T2,B | ||
291 | xor C,D,T1 != | ||
292 | add B,C,B | ||
293 | |||
294 | sethi %hi(0x6b901122),T2 | ||
295 | and T1,B,T1 | ||
296 | or T2,%lo(0x6b901122),T2 != | ||
297 | xor T1,D,T1 | ||
298 | add T1,R12,T1 | ||
299 | LOAD X(13),R13 | ||
300 | add T1,T2,T1 != | ||
301 | add A,T1,A | ||
302 | sll A,7,T2 | ||
303 | srl A,32-7,A | ||
304 | or A,T2,A != | ||
305 | xor B,C,T1 | ||
306 | add A,B,A | ||
307 | |||
308 | sethi %hi(0xfd987193),T2 | ||
309 | and T1,A,T1 != | ||
310 | or T2,%lo(0xfd987193),T2 | ||
311 | xor T1,C,T1 | ||
312 | LOAD X(14),RX | ||
313 | add T1,R13,T1 != | ||
314 | add T1,T2,T1 | ||
315 | add D,T1,D | ||
316 | sll D,12,T2 | ||
317 | srl D,32-12,D != | ||
318 | or D,T2,D | ||
319 | xor A,B,T1 | ||
320 | add D,A,D | ||
321 | |||
322 | sethi %hi(0xa679438e),T2 != | ||
323 | and T1,D,T1 | ||
324 | or T2,%lo(0xa679438e),T2 | ||
325 | xor T1,B,T1 | ||
326 | add T1,RX,T1 != | ||
327 | LOAD X(15),RX | ||
328 | add T1,T2,T1 | ||
329 | add C,T1,C | ||
330 | sll C,17,T2 != | ||
331 | srl C,32-17,C | ||
332 | or C,T2,C | ||
333 | xor D,A,T1 | ||
334 | add C,D,C != | ||
335 | |||
336 | sethi %hi(0x49b40821),T2 | ||
337 | and T1,C,T1 | ||
338 | or T2,%lo(0x49b40821),T2 | ||
339 | xor T1,A,T1 != | ||
340 | add T1,RX,T1 | ||
341 | !pre-LOADed X(1),R1 | ||
342 | add T1,T2,T1 | ||
343 | add B,T1,B | ||
344 | sll B,22,T2 != | ||
345 | srl B,32-22,B | ||
346 | or B,T2,B | ||
347 | add B,C,B | ||
348 | |||
349 | !!!!!!!!Round 1 | ||
350 | |||
351 | xor B,C,T1 != | ||
352 | sethi %hi(0xf61e2562),T2 | ||
353 | and T1,D,T1 | ||
354 | or T2,%lo(0xf61e2562),T2 | ||
355 | xor T1,C,T1 != | ||
356 | add T1,R1,T1 | ||
357 | !pre-LOADed X(6),R6 | ||
358 | add T1,T2,T1 | ||
359 | add A,T1,A | ||
360 | sll A,5,T2 != | ||
361 | srl A,32-5,A | ||
362 | or A,T2,A | ||
363 | add A,B,A | ||
364 | |||
365 | xor A,B,T1 != | ||
366 | sethi %hi(0xc040b340),T2 | ||
367 | and T1,C,T1 | ||
368 | or T2,%lo(0xc040b340),T2 | ||
369 | xor T1,B,T1 != | ||
370 | add T1,R6,T1 | ||
371 | !pre-LOADed X(11),R11 | ||
372 | add T1,T2,T1 | ||
373 | add D,T1,D | ||
374 | sll D,9,T2 != | ||
375 | srl D,32-9,D | ||
376 | or D,T2,D | ||
377 | add D,A,D | ||
378 | |||
379 | xor D,A,T1 != | ||
380 | sethi %hi(0x265e5a51),T2 | ||
381 | and T1,B,T1 | ||
382 | or T2,%lo(0x265e5a51),T2 | ||
383 | xor T1,A,T1 != | ||
384 | add T1,R11,T1 | ||
385 | !pre-LOADed X(0),R0 | ||
386 | add T1,T2,T1 | ||
387 | add C,T1,C | ||
388 | sll C,14,T2 != | ||
389 | srl C,32-14,C | ||
390 | or C,T2,C | ||
391 | add C,D,C | ||
392 | |||
393 | xor C,D,T1 != | ||
394 | sethi %hi(0xe9b6c7aa),T2 | ||
395 | and T1,A,T1 | ||
396 | or T2,%lo(0xe9b6c7aa),T2 | ||
397 | xor T1,D,T1 != | ||
398 | add T1,R0,T1 | ||
399 | !pre-LOADed X(5),R5 | ||
400 | add T1,T2,T1 | ||
401 | add B,T1,B | ||
402 | sll B,20,T2 != | ||
403 | srl B,32-20,B | ||
404 | or B,T2,B | ||
405 | add B,C,B | ||
406 | |||
407 | xor B,C,T1 != | ||
408 | sethi %hi(0xd62f105d),T2 | ||
409 | and T1,D,T1 | ||
410 | or T2,%lo(0xd62f105d),T2 | ||
411 | xor T1,C,T1 != | ||
412 | add T1,R5,T1 | ||
413 | !pre-LOADed X(10),R10 | ||
414 | add T1,T2,T1 | ||
415 | add A,T1,A | ||
416 | sll A,5,T2 != | ||
417 | srl A,32-5,A | ||
418 | or A,T2,A | ||
419 | add A,B,A | ||
420 | |||
421 | xor A,B,T1 != | ||
422 | sethi %hi(0x02441453),T2 | ||
423 | and T1,C,T1 | ||
424 | or T2,%lo(0x02441453),T2 | ||
425 | xor T1,B,T1 != | ||
426 | add T1,R10,T1 | ||
427 | LOAD X(15),RX | ||
428 | add T1,T2,T1 | ||
429 | add D,T1,D != | ||
430 | sll D,9,T2 | ||
431 | srl D,32-9,D | ||
432 | or D,T2,D | ||
433 | add D,A,D != | ||
434 | |||
435 | xor D,A,T1 | ||
436 | sethi %hi(0xd8a1e681),T2 | ||
437 | and T1,B,T1 | ||
438 | or T2,%lo(0xd8a1e681),T2 != | ||
439 | xor T1,A,T1 | ||
440 | add T1,RX,T1 | ||
441 | !pre-LOADed X(4),R4 | ||
442 | add T1,T2,T1 | ||
443 | add C,T1,C != | ||
444 | sll C,14,T2 | ||
445 | srl C,32-14,C | ||
446 | or C,T2,C | ||
447 | add C,D,C != | ||
448 | |||
449 | xor C,D,T1 | ||
450 | sethi %hi(0xe7d3fbc8),T2 | ||
451 | and T1,A,T1 | ||
452 | or T2,%lo(0xe7d3fbc8),T2 != | ||
453 | xor T1,D,T1 | ||
454 | add T1,R4,T1 | ||
455 | !pre-LOADed X(9),R9 | ||
456 | add T1,T2,T1 | ||
457 | add B,T1,B != | ||
458 | sll B,20,T2 | ||
459 | srl B,32-20,B | ||
460 | or B,T2,B | ||
461 | add B,C,B != | ||
462 | |||
463 | xor B,C,T1 | ||
464 | sethi %hi(0x21e1cde6),T2 | ||
465 | and T1,D,T1 | ||
466 | or T2,%lo(0x21e1cde6),T2 != | ||
467 | xor T1,C,T1 | ||
468 | add T1,R9,T1 | ||
469 | LOAD X(14),RX | ||
470 | add T1,T2,T1 != | ||
471 | add A,T1,A | ||
472 | sll A,5,T2 | ||
473 | srl A,32-5,A | ||
474 | or A,T2,A != | ||
475 | add A,B,A | ||
476 | |||
477 | xor A,B,T1 | ||
478 | sethi %hi(0xc33707d6),T2 | ||
479 | and T1,C,T1 != | ||
480 | or T2,%lo(0xc33707d6),T2 | ||
481 | xor T1,B,T1 | ||
482 | add T1,RX,T1 | ||
483 | !pre-LOADed X(3),R3 | ||
484 | add T1,T2,T1 != | ||
485 | add D,T1,D | ||
486 | sll D,9,T2 | ||
487 | srl D,32-9,D | ||
488 | or D,T2,D != | ||
489 | add D,A,D | ||
490 | |||
491 | xor D,A,T1 | ||
492 | sethi %hi(0xf4d50d87),T2 | ||
493 | and T1,B,T1 != | ||
494 | or T2,%lo(0xf4d50d87),T2 | ||
495 | xor T1,A,T1 | ||
496 | add T1,R3,T1 | ||
497 | !pre-LOADed X(8),R8 | ||
498 | add T1,T2,T1 != | ||
499 | add C,T1,C | ||
500 | sll C,14,T2 | ||
501 | srl C,32-14,C | ||
502 | or C,T2,C != | ||
503 | add C,D,C | ||
504 | |||
505 | xor C,D,T1 | ||
506 | sethi %hi(0x455a14ed),T2 | ||
507 | and T1,A,T1 != | ||
508 | or T2,%lo(0x455a14ed),T2 | ||
509 | xor T1,D,T1 | ||
510 | add T1,R8,T1 | ||
511 | !pre-LOADed X(13),R13 | ||
512 | add T1,T2,T1 != | ||
513 | add B,T1,B | ||
514 | sll B,20,T2 | ||
515 | srl B,32-20,B | ||
516 | or B,T2,B != | ||
517 | add B,C,B | ||
518 | |||
519 | xor B,C,T1 | ||
520 | sethi %hi(0xa9e3e905),T2 | ||
521 | and T1,D,T1 != | ||
522 | or T2,%lo(0xa9e3e905),T2 | ||
523 | xor T1,C,T1 | ||
524 | add T1,R13,T1 | ||
525 | !pre-LOADed X(2),R2 | ||
526 | add T1,T2,T1 != | ||
527 | add A,T1,A | ||
528 | sll A,5,T2 | ||
529 | srl A,32-5,A | ||
530 | or A,T2,A != | ||
531 | add A,B,A | ||
532 | |||
533 | xor A,B,T1 | ||
534 | sethi %hi(0xfcefa3f8),T2 | ||
535 | and T1,C,T1 != | ||
536 | or T2,%lo(0xfcefa3f8),T2 | ||
537 | xor T1,B,T1 | ||
538 | add T1,R2,T1 | ||
539 | !pre-LOADed X(7),R7 | ||
540 | add T1,T2,T1 != | ||
541 | add D,T1,D | ||
542 | sll D,9,T2 | ||
543 | srl D,32-9,D | ||
544 | or D,T2,D != | ||
545 | add D,A,D | ||
546 | |||
547 | xor D,A,T1 | ||
548 | sethi %hi(0x676f02d9),T2 | ||
549 | and T1,B,T1 != | ||
550 | or T2,%lo(0x676f02d9),T2 | ||
551 | xor T1,A,T1 | ||
552 | add T1,R7,T1 | ||
553 | !pre-LOADed X(12),R12 | ||
554 | add T1,T2,T1 != | ||
555 | add C,T1,C | ||
556 | sll C,14,T2 | ||
557 | srl C,32-14,C | ||
558 | or C,T2,C != | ||
559 | add C,D,C | ||
560 | |||
561 | xor C,D,T1 | ||
562 | sethi %hi(0x8d2a4c8a),T2 | ||
563 | and T1,A,T1 != | ||
564 | or T2,%lo(0x8d2a4c8a),T2 | ||
565 | xor T1,D,T1 | ||
566 | add T1,R12,T1 | ||
567 | !pre-LOADed X(5),R5 | ||
568 | add T1,T2,T1 != | ||
569 | add B,T1,B | ||
570 | sll B,20,T2 | ||
571 | srl B,32-20,B | ||
572 | or B,T2,B != | ||
573 | add B,C,B | ||
574 | |||
575 | !!!!!!!!Round 2 | ||
576 | |||
577 | xor B,C,T1 | ||
578 | sethi %hi(0xfffa3942),T2 | ||
579 | xor T1,D,T1 != | ||
580 | or T2,%lo(0xfffa3942),T2 | ||
581 | add T1,R5,T1 | ||
582 | !pre-LOADed X(8),R8 | ||
583 | add T1,T2,T1 | ||
584 | add A,T1,A != | ||
585 | sll A,4,T2 | ||
586 | srl A,32-4,A | ||
587 | or A,T2,A | ||
588 | add A,B,A != | ||
589 | |||
590 | xor A,B,T1 | ||
591 | sethi %hi(0x8771f681),T2 | ||
592 | xor T1,C,T1 | ||
593 | or T2,%lo(0x8771f681),T2 != | ||
594 | add T1,R8,T1 | ||
595 | !pre-LOADed X(11),R11 | ||
596 | add T1,T2,T1 | ||
597 | add D,T1,D | ||
598 | sll D,11,T2 != | ||
599 | srl D,32-11,D | ||
600 | or D,T2,D | ||
601 | add D,A,D | ||
602 | |||
603 | xor D,A,T1 != | ||
604 | sethi %hi(0x6d9d6122),T2 | ||
605 | xor T1,B,T1 | ||
606 | or T2,%lo(0x6d9d6122),T2 | ||
607 | add T1,R11,T1 != | ||
608 | LOAD X(14),RX | ||
609 | add T1,T2,T1 | ||
610 | add C,T1,C | ||
611 | sll C,16,T2 != | ||
612 | srl C,32-16,C | ||
613 | or C,T2,C | ||
614 | add C,D,C | ||
615 | |||
616 | xor C,D,T1 != | ||
617 | sethi %hi(0xfde5380c),T2 | ||
618 | xor T1,A,T1 | ||
619 | or T2,%lo(0xfde5380c),T2 | ||
620 | add T1,RX,T1 != | ||
621 | !pre-LOADed X(1),R1 | ||
622 | add T1,T2,T1 | ||
623 | add B,T1,B | ||
624 | sll B,23,T2 | ||
625 | srl B,32-23,B != | ||
626 | or B,T2,B | ||
627 | add B,C,B | ||
628 | |||
629 | xor B,C,T1 | ||
630 | sethi %hi(0xa4beea44),T2 != | ||
631 | xor T1,D,T1 | ||
632 | or T2,%lo(0xa4beea44),T2 | ||
633 | add T1,R1,T1 | ||
634 | !pre-LOADed X(4),R4 | ||
635 | add T1,T2,T1 != | ||
636 | add A,T1,A | ||
637 | sll A,4,T2 | ||
638 | srl A,32-4,A | ||
639 | or A,T2,A != | ||
640 | add A,B,A | ||
641 | |||
642 | xor A,B,T1 | ||
643 | sethi %hi(0x4bdecfa9),T2 | ||
644 | xor T1,C,T1 != | ||
645 | or T2,%lo(0x4bdecfa9),T2 | ||
646 | add T1,R4,T1 | ||
647 | !pre-LOADed X(7),R7 | ||
648 | add T1,T2,T1 | ||
649 | add D,T1,D != | ||
650 | sll D,11,T2 | ||
651 | srl D,32-11,D | ||
652 | or D,T2,D | ||
653 | add D,A,D != | ||
654 | |||
655 | xor D,A,T1 | ||
656 | sethi %hi(0xf6bb4b60),T2 | ||
657 | xor T1,B,T1 | ||
658 | or T2,%lo(0xf6bb4b60),T2 != | ||
659 | add T1,R7,T1 | ||
660 | !pre-LOADed X(10),R10 | ||
661 | add T1,T2,T1 | ||
662 | add C,T1,C | ||
663 | sll C,16,T2 != | ||
664 | srl C,32-16,C | ||
665 | or C,T2,C | ||
666 | add C,D,C | ||
667 | |||
668 | xor C,D,T1 != | ||
669 | sethi %hi(0xbebfbc70),T2 | ||
670 | xor T1,A,T1 | ||
671 | or T2,%lo(0xbebfbc70),T2 | ||
672 | add T1,R10,T1 != | ||
673 | !pre-LOADed X(13),R13 | ||
674 | add T1,T2,T1 | ||
675 | add B,T1,B | ||
676 | sll B,23,T2 | ||
677 | srl B,32-23,B != | ||
678 | or B,T2,B | ||
679 | add B,C,B | ||
680 | |||
681 | xor B,C,T1 | ||
682 | sethi %hi(0x289b7ec6),T2 != | ||
683 | xor T1,D,T1 | ||
684 | or T2,%lo(0x289b7ec6),T2 | ||
685 | add T1,R13,T1 | ||
686 | !pre-LOADed X(0),R0 | ||
687 | add T1,T2,T1 != | ||
688 | add A,T1,A | ||
689 | sll A,4,T2 | ||
690 | srl A,32-4,A | ||
691 | or A,T2,A != | ||
692 | add A,B,A | ||
693 | |||
694 | xor A,B,T1 | ||
695 | sethi %hi(0xeaa127fa),T2 | ||
696 | xor T1,C,T1 != | ||
697 | or T2,%lo(0xeaa127fa),T2 | ||
698 | add T1,R0,T1 | ||
699 | !pre-LOADed X(3),R3 | ||
700 | add T1,T2,T1 | ||
701 | add D,T1,D != | ||
702 | sll D,11,T2 | ||
703 | srl D,32-11,D | ||
704 | or D,T2,D | ||
705 | add D,A,D != | ||
706 | |||
707 | xor D,A,T1 | ||
708 | sethi %hi(0xd4ef3085),T2 | ||
709 | xor T1,B,T1 | ||
710 | or T2,%lo(0xd4ef3085),T2 != | ||
711 | add T1,R3,T1 | ||
712 | !pre-LOADed X(6),R6 | ||
713 | add T1,T2,T1 | ||
714 | add C,T1,C | ||
715 | sll C,16,T2 != | ||
716 | srl C,32-16,C | ||
717 | or C,T2,C | ||
718 | add C,D,C | ||
719 | |||
720 | xor C,D,T1 != | ||
721 | sethi %hi(0x04881d05),T2 | ||
722 | xor T1,A,T1 | ||
723 | or T2,%lo(0x04881d05),T2 | ||
724 | add T1,R6,T1 != | ||
725 | !pre-LOADed X(9),R9 | ||
726 | add T1,T2,T1 | ||
727 | add B,T1,B | ||
728 | sll B,23,T2 | ||
729 | srl B,32-23,B != | ||
730 | or B,T2,B | ||
731 | add B,C,B | ||
732 | |||
733 | xor B,C,T1 | ||
734 | sethi %hi(0xd9d4d039),T2 != | ||
735 | xor T1,D,T1 | ||
736 | or T2,%lo(0xd9d4d039),T2 | ||
737 | add T1,R9,T1 | ||
738 | !pre-LOADed X(12),R12 | ||
739 | add T1,T2,T1 != | ||
740 | add A,T1,A | ||
741 | sll A,4,T2 | ||
742 | srl A,32-4,A | ||
743 | or A,T2,A != | ||
744 | add A,B,A | ||
745 | |||
746 | xor A,B,T1 | ||
747 | sethi %hi(0xe6db99e5),T2 | ||
748 | xor T1,C,T1 != | ||
749 | or T2,%lo(0xe6db99e5),T2 | ||
750 | add T1,R12,T1 | ||
751 | LOAD X(15),RX | ||
752 | add T1,T2,T1 != | ||
753 | add D,T1,D | ||
754 | sll D,11,T2 | ||
755 | srl D,32-11,D | ||
756 | or D,T2,D != | ||
757 | add D,A,D | ||
758 | |||
759 | xor D,A,T1 | ||
760 | sethi %hi(0x1fa27cf8),T2 | ||
761 | xor T1,B,T1 != | ||
762 | or T2,%lo(0x1fa27cf8),T2 | ||
763 | add T1,RX,T1 | ||
764 | !pre-LOADed X(2),R2 | ||
765 | add T1,T2,T1 | ||
766 | add C,T1,C != | ||
767 | sll C,16,T2 | ||
768 | srl C,32-16,C | ||
769 | or C,T2,C | ||
770 | add C,D,C != | ||
771 | |||
772 | xor C,D,T1 | ||
773 | sethi %hi(0xc4ac5665),T2 | ||
774 | xor T1,A,T1 | ||
775 | or T2,%lo(0xc4ac5665),T2 != | ||
776 | add T1,R2,T1 | ||
777 | !pre-LOADed X(0),R0 | ||
778 | add T1,T2,T1 | ||
779 | add B,T1,B | ||
780 | sll B,23,T2 != | ||
781 | srl B,32-23,B | ||
782 | or B,T2,B | ||
783 | add B,C,B | ||
784 | |||
785 | !!!!!!!!Round 3 | ||
786 | |||
787 | orn B,D,T1 != | ||
788 | sethi %hi(0xf4292244),T2 | ||
789 | xor T1,C,T1 | ||
790 | or T2,%lo(0xf4292244),T2 | ||
791 | add T1,R0,T1 != | ||
792 | !pre-LOADed X(7),R7 | ||
793 | add T1,T2,T1 | ||
794 | add A,T1,A | ||
795 | sll A,6,T2 | ||
796 | srl A,32-6,A != | ||
797 | or A,T2,A | ||
798 | add A,B,A | ||
799 | |||
800 | orn A,C,T1 | ||
801 | sethi %hi(0x432aff97),T2 != | ||
802 | xor T1,B,T1 | ||
803 | or T2,%lo(0x432aff97),T2 | ||
804 | LOAD X(14),RX | ||
805 | add T1,R7,T1 != | ||
806 | add T1,T2,T1 | ||
807 | add D,T1,D | ||
808 | sll D,10,T2 | ||
809 | srl D,32-10,D != | ||
810 | or D,T2,D | ||
811 | add D,A,D | ||
812 | |||
813 | orn D,B,T1 | ||
814 | sethi %hi(0xab9423a7),T2 != | ||
815 | xor T1,A,T1 | ||
816 | or T2,%lo(0xab9423a7),T2 | ||
817 | add T1,RX,T1 | ||
818 | !pre-LOADed X(5),R5 | ||
819 | add T1,T2,T1 != | ||
820 | add C,T1,C | ||
821 | sll C,15,T2 | ||
822 | srl C,32-15,C | ||
823 | or C,T2,C != | ||
824 | add C,D,C | ||
825 | |||
826 | orn C,A,T1 | ||
827 | sethi %hi(0xfc93a039),T2 | ||
828 | xor T1,D,T1 != | ||
829 | or T2,%lo(0xfc93a039),T2 | ||
830 | add T1,R5,T1 | ||
831 | !pre-LOADed X(12),R12 | ||
832 | add T1,T2,T1 | ||
833 | add B,T1,B != | ||
834 | sll B,21,T2 | ||
835 | srl B,32-21,B | ||
836 | or B,T2,B | ||
837 | add B,C,B != | ||
838 | |||
839 | orn B,D,T1 | ||
840 | sethi %hi(0x655b59c3),T2 | ||
841 | xor T1,C,T1 | ||
842 | or T2,%lo(0x655b59c3),T2 != | ||
843 | add T1,R12,T1 | ||
844 | !pre-LOADed X(3),R3 | ||
845 | add T1,T2,T1 | ||
846 | add A,T1,A | ||
847 | sll A,6,T2 != | ||
848 | srl A,32-6,A | ||
849 | or A,T2,A | ||
850 | add A,B,A | ||
851 | |||
852 | orn A,C,T1 != | ||
853 | sethi %hi(0x8f0ccc92),T2 | ||
854 | xor T1,B,T1 | ||
855 | or T2,%lo(0x8f0ccc92),T2 | ||
856 | add T1,R3,T1 != | ||
857 | !pre-LOADed X(10),R10 | ||
858 | add T1,T2,T1 | ||
859 | add D,T1,D | ||
860 | sll D,10,T2 | ||
861 | srl D,32-10,D != | ||
862 | or D,T2,D | ||
863 | add D,A,D | ||
864 | |||
865 | orn D,B,T1 | ||
866 | sethi %hi(0xffeff47d),T2 != | ||
867 | xor T1,A,T1 | ||
868 | or T2,%lo(0xffeff47d),T2 | ||
869 | add T1,R10,T1 | ||
870 | !pre-LOADed X(1),R1 | ||
871 | add T1,T2,T1 != | ||
872 | add C,T1,C | ||
873 | sll C,15,T2 | ||
874 | srl C,32-15,C | ||
875 | or C,T2,C != | ||
876 | add C,D,C | ||
877 | |||
878 | orn C,A,T1 | ||
879 | sethi %hi(0x85845dd1),T2 | ||
880 | xor T1,D,T1 != | ||
881 | or T2,%lo(0x85845dd1),T2 | ||
882 | add T1,R1,T1 | ||
883 | !pre-LOADed X(8),R8 | ||
884 | add T1,T2,T1 | ||
885 | add B,T1,B != | ||
886 | sll B,21,T2 | ||
887 | srl B,32-21,B | ||
888 | or B,T2,B | ||
889 | add B,C,B != | ||
890 | |||
891 | orn B,D,T1 | ||
892 | sethi %hi(0x6fa87e4f),T2 | ||
893 | xor T1,C,T1 | ||
894 | or T2,%lo(0x6fa87e4f),T2 != | ||
895 | add T1,R8,T1 | ||
896 | LOAD X(15),RX | ||
897 | add T1,T2,T1 | ||
898 | add A,T1,A != | ||
899 | sll A,6,T2 | ||
900 | srl A,32-6,A | ||
901 | or A,T2,A | ||
902 | add A,B,A != | ||
903 | |||
904 | orn A,C,T1 | ||
905 | sethi %hi(0xfe2ce6e0),T2 | ||
906 | xor T1,B,T1 | ||
907 | or T2,%lo(0xfe2ce6e0),T2 != | ||
908 | add T1,RX,T1 | ||
909 | !pre-LOADed X(6),R6 | ||
910 | add T1,T2,T1 | ||
911 | add D,T1,D | ||
912 | sll D,10,T2 != | ||
913 | srl D,32-10,D | ||
914 | or D,T2,D | ||
915 | add D,A,D | ||
916 | |||
917 | orn D,B,T1 != | ||
918 | sethi %hi(0xa3014314),T2 | ||
919 | xor T1,A,T1 | ||
920 | or T2,%lo(0xa3014314),T2 | ||
921 | add T1,R6,T1 != | ||
922 | !pre-LOADed X(13),R13 | ||
923 | add T1,T2,T1 | ||
924 | add C,T1,C | ||
925 | sll C,15,T2 | ||
926 | srl C,32-15,C != | ||
927 | or C,T2,C | ||
928 | add C,D,C | ||
929 | |||
930 | orn C,A,T1 | ||
931 | sethi %hi(0x4e0811a1),T2 != | ||
932 | xor T1,D,T1 | ||
933 | or T2,%lo(0x4e0811a1),T2 | ||
934 | !pre-LOADed X(4),R4 | ||
935 | ld [Aptr],Aval | ||
936 | add T1,R13,T1 != | ||
937 | add T1,T2,T1 | ||
938 | add B,T1,B | ||
939 | sll B,21,T2 | ||
940 | srl B,32-21,B != | ||
941 | or B,T2,B | ||
942 | add B,C,B | ||
943 | |||
944 | orn B,D,T1 | ||
945 | sethi %hi(0xf7537e82),T2 != | ||
946 | xor T1,C,T1 | ||
947 | or T2,%lo(0xf7537e82),T2 | ||
948 | !pre-LOADed X(11),R11 | ||
949 | ld [Dptr],Dval | ||
950 | add T1,R4,T1 != | ||
951 | add T1,T2,T1 | ||
952 | add A,T1,A | ||
953 | sll A,6,T2 | ||
954 | srl A,32-6,A != | ||
955 | or A,T2,A | ||
956 | add A,B,A | ||
957 | |||
958 | orn A,C,T1 | ||
959 | sethi %hi(0xbd3af235),T2 != | ||
960 | xor T1,B,T1 | ||
961 | or T2,%lo(0xbd3af235),T2 | ||
962 | !pre-LOADed X(2),R2 | ||
963 | ld [Cptr],Cval | ||
964 | add T1,R11,T1 != | ||
965 | add T1,T2,T1 | ||
966 | add D,T1,D | ||
967 | sll D,10,T2 | ||
968 | srl D,32-10,D != | ||
969 | or D,T2,D | ||
970 | add D,A,D | ||
971 | |||
972 | orn D,B,T1 | ||
973 | sethi %hi(0x2ad7d2bb),T2 != | ||
974 | xor T1,A,T1 | ||
975 | or T2,%lo(0x2ad7d2bb),T2 | ||
976 | !pre-LOADed X(9),R9 | ||
977 | ld [Bptr],Bval | ||
978 | add T1,R2,T1 != | ||
979 | add Aval,A,Aval | ||
980 | add T1,T2,T1 | ||
981 | st Aval,[Aptr] | ||
982 | add C,T1,C != | ||
983 | sll C,15,T2 | ||
984 | add Dval,D,Dval | ||
985 | srl C,32-15,C | ||
986 | or C,T2,C != | ||
987 | st Dval,[Dptr] | ||
988 | add C,D,C | ||
989 | |||
990 | orn C,A,T1 | ||
991 | sethi %hi(0xeb86d391),T2 != | ||
992 | xor T1,D,T1 | ||
993 | or T2,%lo(0xeb86d391),T2 | ||
994 | add T1,R9,T1 | ||
995 | !pre-LOADed X(0),R0 | ||
996 | mov Aval,A != | ||
997 | add T1,T2,T1 | ||
998 | mov Dval,D | ||
999 | add B,T1,B | ||
1000 | sll B,21,T2 != | ||
1001 | add Cval,C,Cval | ||
1002 | srl B,32-21,B | ||
1003 | st Cval,[Cptr] | ||
1004 | or B,T2,B != | ||
1005 | add B,C,B | ||
1006 | |||
1007 | deccc %i2 | ||
1008 | mov Cval,C | ||
1009 | add B,Bval,B != | ||
1010 | inc 64,%i1 | ||
1011 | nop | ||
1012 | st B,[Bptr] | ||
1013 | nop != | ||
1014 | |||
1015 | #ifdef ULTRASPARC | ||
1016 | bg,a,pt %icc,.Lmd5_block_loop | ||
1017 | #else | ||
1018 | bg,a .Lmd5_block_loop | ||
1019 | #endif | ||
1020 | LOAD X(0),R0 | ||
1021 | |||
1022 | #ifdef ASI_PRIMARY_LITTLE | ||
1023 | wr %g0,%o7,%asi | ||
1024 | #endif | ||
1025 | ret | ||
1026 | restore %g0,0,%o0 | ||
1027 | |||
1028 | .type md5_block,#function | ||
1029 | .size md5_block,(.-md5_block) | ||
diff --git a/src/lib/libcrypto/md5/asm/mx86unix.cpp b/src/lib/libcrypto/md5/asm/mx86unix.cpp deleted file mode 100644 index 5d399122b6..0000000000 --- a/src/lib/libcrypto/md5/asm/mx86unix.cpp +++ /dev/null | |||
@@ -1,730 +0,0 @@ | |||
1 | /* Run the C pre-processor over this file with one of the following defined | ||
2 | * ELF - elf object files, | ||
3 | * OUT - a.out object files, | ||
4 | * BSDI - BSDI style a.out object files | ||
5 | * SOL - Solaris style elf | ||
6 | */ | ||
7 | |||
8 | #define TYPE(a,b) .type a,b | ||
9 | #define SIZE(a,b) .size a,b | ||
10 | |||
11 | #if defined(OUT) || defined(BSDI) | ||
12 | #define md5_block_x86 _md5_block_x86 | ||
13 | |||
14 | #endif | ||
15 | |||
16 | #ifdef OUT | ||
17 | #define OK 1 | ||
18 | #define ALIGN 4 | ||
19 | #endif | ||
20 | |||
21 | #ifdef BSDI | ||
22 | #define OK 1 | ||
23 | #define ALIGN 4 | ||
24 | #undef SIZE | ||
25 | #undef TYPE | ||
26 | #define SIZE(a,b) | ||
27 | #define TYPE(a,b) | ||
28 | #endif | ||
29 | |||
30 | #if defined(ELF) || defined(SOL) | ||
31 | #define OK 1 | ||
32 | #define ALIGN 16 | ||
33 | #endif | ||
34 | |||
35 | #ifndef OK | ||
36 | You need to define one of | ||
37 | ELF - elf systems - linux-elf, NetBSD and DG-UX | ||
38 | OUT - a.out systems - linux-a.out and FreeBSD | ||
39 | SOL - solaris systems, which are elf with strange comment lines | ||
40 | BSDI - a.out with a very primative version of as. | ||
41 | #endif | ||
42 | |||
43 | /* Let the Assembler begin :-) */ | ||
44 | /* Don't even think of reading this code */ | ||
45 | /* It was automatically generated by md5-586.pl */ | ||
46 | /* Which is a perl program used to generate the x86 assember for */ | ||
47 | /* any of elf, a.out, BSDI,Win32, or Solaris */ | ||
48 | /* eric <eay@cryptsoft.com> */ | ||
49 | |||
50 | .file "md5-586.s" | ||
51 | .version "01.01" | ||
52 | gcc2_compiled.: | ||
53 | .text | ||
54 | .align ALIGN | ||
55 | .globl md5_block_x86 | ||
56 | TYPE(md5_block_x86,@function) | ||
57 | md5_block_x86: | ||
58 | pushl %esi | ||
59 | pushl %edi | ||
60 | movl 12(%esp), %edi | ||
61 | movl 16(%esp), %esi | ||
62 | movl 20(%esp), %ecx | ||
63 | pushl %ebp | ||
64 | pushl %ebx | ||
65 | addl %esi, %ecx | ||
66 | subl $64, %ecx | ||
67 | movl (%edi), %eax | ||
68 | pushl %ecx | ||
69 | movl 4(%edi), %ebx | ||
70 | movl 8(%edi), %ecx | ||
71 | movl 12(%edi), %edx | ||
72 | .L000start: | ||
73 | |||
74 | /* R0 section */ | ||
75 | movl %ecx, %edi | ||
76 | movl (%esi), %ebp | ||
77 | /* R0 0 */ | ||
78 | xorl %edx, %edi | ||
79 | andl %ebx, %edi | ||
80 | leal 3614090360(%eax,%ebp,1),%eax | ||
81 | movl 4(%esi), %ebp | ||
82 | xorl %edx, %edi | ||
83 | addl %edi, %eax | ||
84 | movl %ebx, %edi | ||
85 | roll $7, %eax | ||
86 | addl %ebx, %eax | ||
87 | /* R0 1 */ | ||
88 | xorl %ecx, %edi | ||
89 | andl %eax, %edi | ||
90 | leal 3905402710(%edx,%ebp,1),%edx | ||
91 | movl 8(%esi), %ebp | ||
92 | xorl %ecx, %edi | ||
93 | addl %edi, %edx | ||
94 | movl %eax, %edi | ||
95 | roll $12, %edx | ||
96 | addl %eax, %edx | ||
97 | /* R0 2 */ | ||
98 | xorl %ebx, %edi | ||
99 | andl %edx, %edi | ||
100 | leal 606105819(%ecx,%ebp,1),%ecx | ||
101 | movl 12(%esi), %ebp | ||
102 | xorl %ebx, %edi | ||
103 | addl %edi, %ecx | ||
104 | movl %edx, %edi | ||
105 | roll $17, %ecx | ||
106 | addl %edx, %ecx | ||
107 | /* R0 3 */ | ||
108 | xorl %eax, %edi | ||
109 | andl %ecx, %edi | ||
110 | leal 3250441966(%ebx,%ebp,1),%ebx | ||
111 | movl 16(%esi), %ebp | ||
112 | xorl %eax, %edi | ||
113 | addl %edi, %ebx | ||
114 | movl %ecx, %edi | ||
115 | roll $22, %ebx | ||
116 | addl %ecx, %ebx | ||
117 | /* R0 4 */ | ||
118 | xorl %edx, %edi | ||
119 | andl %ebx, %edi | ||
120 | leal 4118548399(%eax,%ebp,1),%eax | ||
121 | movl 20(%esi), %ebp | ||
122 | xorl %edx, %edi | ||
123 | addl %edi, %eax | ||
124 | movl %ebx, %edi | ||
125 | roll $7, %eax | ||
126 | addl %ebx, %eax | ||
127 | /* R0 5 */ | ||
128 | xorl %ecx, %edi | ||
129 | andl %eax, %edi | ||
130 | leal 1200080426(%edx,%ebp,1),%edx | ||
131 | movl 24(%esi), %ebp | ||
132 | xorl %ecx, %edi | ||
133 | addl %edi, %edx | ||
134 | movl %eax, %edi | ||
135 | roll $12, %edx | ||
136 | addl %eax, %edx | ||
137 | /* R0 6 */ | ||
138 | xorl %ebx, %edi | ||
139 | andl %edx, %edi | ||
140 | leal 2821735955(%ecx,%ebp,1),%ecx | ||
141 | movl 28(%esi), %ebp | ||
142 | xorl %ebx, %edi | ||
143 | addl %edi, %ecx | ||
144 | movl %edx, %edi | ||
145 | roll $17, %ecx | ||
146 | addl %edx, %ecx | ||
147 | /* R0 7 */ | ||
148 | xorl %eax, %edi | ||
149 | andl %ecx, %edi | ||
150 | leal 4249261313(%ebx,%ebp,1),%ebx | ||
151 | movl 32(%esi), %ebp | ||
152 | xorl %eax, %edi | ||
153 | addl %edi, %ebx | ||
154 | movl %ecx, %edi | ||
155 | roll $22, %ebx | ||
156 | addl %ecx, %ebx | ||
157 | /* R0 8 */ | ||
158 | xorl %edx, %edi | ||
159 | andl %ebx, %edi | ||
160 | leal 1770035416(%eax,%ebp,1),%eax | ||
161 | movl 36(%esi), %ebp | ||
162 | xorl %edx, %edi | ||
163 | addl %edi, %eax | ||
164 | movl %ebx, %edi | ||
165 | roll $7, %eax | ||
166 | addl %ebx, %eax | ||
167 | /* R0 9 */ | ||
168 | xorl %ecx, %edi | ||
169 | andl %eax, %edi | ||
170 | leal 2336552879(%edx,%ebp,1),%edx | ||
171 | movl 40(%esi), %ebp | ||
172 | xorl %ecx, %edi | ||
173 | addl %edi, %edx | ||
174 | movl %eax, %edi | ||
175 | roll $12, %edx | ||
176 | addl %eax, %edx | ||
177 | /* R0 10 */ | ||
178 | xorl %ebx, %edi | ||
179 | andl %edx, %edi | ||
180 | leal 4294925233(%ecx,%ebp,1),%ecx | ||
181 | movl 44(%esi), %ebp | ||
182 | xorl %ebx, %edi | ||
183 | addl %edi, %ecx | ||
184 | movl %edx, %edi | ||
185 | roll $17, %ecx | ||
186 | addl %edx, %ecx | ||
187 | /* R0 11 */ | ||
188 | xorl %eax, %edi | ||
189 | andl %ecx, %edi | ||
190 | leal 2304563134(%ebx,%ebp,1),%ebx | ||
191 | movl 48(%esi), %ebp | ||
192 | xorl %eax, %edi | ||
193 | addl %edi, %ebx | ||
194 | movl %ecx, %edi | ||
195 | roll $22, %ebx | ||
196 | addl %ecx, %ebx | ||
197 | /* R0 12 */ | ||
198 | xorl %edx, %edi | ||
199 | andl %ebx, %edi | ||
200 | leal 1804603682(%eax,%ebp,1),%eax | ||
201 | movl 52(%esi), %ebp | ||
202 | xorl %edx, %edi | ||
203 | addl %edi, %eax | ||
204 | movl %ebx, %edi | ||
205 | roll $7, %eax | ||
206 | addl %ebx, %eax | ||
207 | /* R0 13 */ | ||
208 | xorl %ecx, %edi | ||
209 | andl %eax, %edi | ||
210 | leal 4254626195(%edx,%ebp,1),%edx | ||
211 | movl 56(%esi), %ebp | ||
212 | xorl %ecx, %edi | ||
213 | addl %edi, %edx | ||
214 | movl %eax, %edi | ||
215 | roll $12, %edx | ||
216 | addl %eax, %edx | ||
217 | /* R0 14 */ | ||
218 | xorl %ebx, %edi | ||
219 | andl %edx, %edi | ||
220 | leal 2792965006(%ecx,%ebp,1),%ecx | ||
221 | movl 60(%esi), %ebp | ||
222 | xorl %ebx, %edi | ||
223 | addl %edi, %ecx | ||
224 | movl %edx, %edi | ||
225 | roll $17, %ecx | ||
226 | addl %edx, %ecx | ||
227 | /* R0 15 */ | ||
228 | xorl %eax, %edi | ||
229 | andl %ecx, %edi | ||
230 | leal 1236535329(%ebx,%ebp,1),%ebx | ||
231 | movl 4(%esi), %ebp | ||
232 | xorl %eax, %edi | ||
233 | addl %edi, %ebx | ||
234 | movl %ecx, %edi | ||
235 | roll $22, %ebx | ||
236 | addl %ecx, %ebx | ||
237 | |||
238 | /* R1 section */ | ||
239 | /* R1 16 */ | ||
240 | leal 4129170786(%eax,%ebp,1),%eax | ||
241 | xorl %ebx, %edi | ||
242 | andl %edx, %edi | ||
243 | movl 24(%esi), %ebp | ||
244 | xorl %ecx, %edi | ||
245 | addl %edi, %eax | ||
246 | movl %ebx, %edi | ||
247 | roll $5, %eax | ||
248 | addl %ebx, %eax | ||
249 | /* R1 17 */ | ||
250 | leal 3225465664(%edx,%ebp,1),%edx | ||
251 | xorl %eax, %edi | ||
252 | andl %ecx, %edi | ||
253 | movl 44(%esi), %ebp | ||
254 | xorl %ebx, %edi | ||
255 | addl %edi, %edx | ||
256 | movl %eax, %edi | ||
257 | roll $9, %edx | ||
258 | addl %eax, %edx | ||
259 | /* R1 18 */ | ||
260 | leal 643717713(%ecx,%ebp,1),%ecx | ||
261 | xorl %edx, %edi | ||
262 | andl %ebx, %edi | ||
263 | movl (%esi), %ebp | ||
264 | xorl %eax, %edi | ||
265 | addl %edi, %ecx | ||
266 | movl %edx, %edi | ||
267 | roll $14, %ecx | ||
268 | addl %edx, %ecx | ||
269 | /* R1 19 */ | ||
270 | leal 3921069994(%ebx,%ebp,1),%ebx | ||
271 | xorl %ecx, %edi | ||
272 | andl %eax, %edi | ||
273 | movl 20(%esi), %ebp | ||
274 | xorl %edx, %edi | ||
275 | addl %edi, %ebx | ||
276 | movl %ecx, %edi | ||
277 | roll $20, %ebx | ||
278 | addl %ecx, %ebx | ||
279 | /* R1 20 */ | ||
280 | leal 3593408605(%eax,%ebp,1),%eax | ||
281 | xorl %ebx, %edi | ||
282 | andl %edx, %edi | ||
283 | movl 40(%esi), %ebp | ||
284 | xorl %ecx, %edi | ||
285 | addl %edi, %eax | ||
286 | movl %ebx, %edi | ||
287 | roll $5, %eax | ||
288 | addl %ebx, %eax | ||
289 | /* R1 21 */ | ||
290 | leal 38016083(%edx,%ebp,1),%edx | ||
291 | xorl %eax, %edi | ||
292 | andl %ecx, %edi | ||
293 | movl 60(%esi), %ebp | ||
294 | xorl %ebx, %edi | ||
295 | addl %edi, %edx | ||
296 | movl %eax, %edi | ||
297 | roll $9, %edx | ||
298 | addl %eax, %edx | ||
299 | /* R1 22 */ | ||
300 | leal 3634488961(%ecx,%ebp,1),%ecx | ||
301 | xorl %edx, %edi | ||
302 | andl %ebx, %edi | ||
303 | movl 16(%esi), %ebp | ||
304 | xorl %eax, %edi | ||
305 | addl %edi, %ecx | ||
306 | movl %edx, %edi | ||
307 | roll $14, %ecx | ||
308 | addl %edx, %ecx | ||
309 | /* R1 23 */ | ||
310 | leal 3889429448(%ebx,%ebp,1),%ebx | ||
311 | xorl %ecx, %edi | ||
312 | andl %eax, %edi | ||
313 | movl 36(%esi), %ebp | ||
314 | xorl %edx, %edi | ||
315 | addl %edi, %ebx | ||
316 | movl %ecx, %edi | ||
317 | roll $20, %ebx | ||
318 | addl %ecx, %ebx | ||
319 | /* R1 24 */ | ||
320 | leal 568446438(%eax,%ebp,1),%eax | ||
321 | xorl %ebx, %edi | ||
322 | andl %edx, %edi | ||
323 | movl 56(%esi), %ebp | ||
324 | xorl %ecx, %edi | ||
325 | addl %edi, %eax | ||
326 | movl %ebx, %edi | ||
327 | roll $5, %eax | ||
328 | addl %ebx, %eax | ||
329 | /* R1 25 */ | ||
330 | leal 3275163606(%edx,%ebp,1),%edx | ||
331 | xorl %eax, %edi | ||
332 | andl %ecx, %edi | ||
333 | movl 12(%esi), %ebp | ||
334 | xorl %ebx, %edi | ||
335 | addl %edi, %edx | ||
336 | movl %eax, %edi | ||
337 | roll $9, %edx | ||
338 | addl %eax, %edx | ||
339 | /* R1 26 */ | ||
340 | leal 4107603335(%ecx,%ebp,1),%ecx | ||
341 | xorl %edx, %edi | ||
342 | andl %ebx, %edi | ||
343 | movl 32(%esi), %ebp | ||
344 | xorl %eax, %edi | ||
345 | addl %edi, %ecx | ||
346 | movl %edx, %edi | ||
347 | roll $14, %ecx | ||
348 | addl %edx, %ecx | ||
349 | /* R1 27 */ | ||
350 | leal 1163531501(%ebx,%ebp,1),%ebx | ||
351 | xorl %ecx, %edi | ||
352 | andl %eax, %edi | ||
353 | movl 52(%esi), %ebp | ||
354 | xorl %edx, %edi | ||
355 | addl %edi, %ebx | ||
356 | movl %ecx, %edi | ||
357 | roll $20, %ebx | ||
358 | addl %ecx, %ebx | ||
359 | /* R1 28 */ | ||
360 | leal 2850285829(%eax,%ebp,1),%eax | ||
361 | xorl %ebx, %edi | ||
362 | andl %edx, %edi | ||
363 | movl 8(%esi), %ebp | ||
364 | xorl %ecx, %edi | ||
365 | addl %edi, %eax | ||
366 | movl %ebx, %edi | ||
367 | roll $5, %eax | ||
368 | addl %ebx, %eax | ||
369 | /* R1 29 */ | ||
370 | leal 4243563512(%edx,%ebp,1),%edx | ||
371 | xorl %eax, %edi | ||
372 | andl %ecx, %edi | ||
373 | movl 28(%esi), %ebp | ||
374 | xorl %ebx, %edi | ||
375 | addl %edi, %edx | ||
376 | movl %eax, %edi | ||
377 | roll $9, %edx | ||
378 | addl %eax, %edx | ||
379 | /* R1 30 */ | ||
380 | leal 1735328473(%ecx,%ebp,1),%ecx | ||
381 | xorl %edx, %edi | ||
382 | andl %ebx, %edi | ||
383 | movl 48(%esi), %ebp | ||
384 | xorl %eax, %edi | ||
385 | addl %edi, %ecx | ||
386 | movl %edx, %edi | ||
387 | roll $14, %ecx | ||
388 | addl %edx, %ecx | ||
389 | /* R1 31 */ | ||
390 | leal 2368359562(%ebx,%ebp,1),%ebx | ||
391 | xorl %ecx, %edi | ||
392 | andl %eax, %edi | ||
393 | movl 20(%esi), %ebp | ||
394 | xorl %edx, %edi | ||
395 | addl %edi, %ebx | ||
396 | movl %ecx, %edi | ||
397 | roll $20, %ebx | ||
398 | addl %ecx, %ebx | ||
399 | |||
400 | /* R2 section */ | ||
401 | /* R2 32 */ | ||
402 | xorl %edx, %edi | ||
403 | xorl %ebx, %edi | ||
404 | leal 4294588738(%eax,%ebp,1),%eax | ||
405 | addl %edi, %eax | ||
406 | movl 32(%esi), %ebp | ||
407 | roll $4, %eax | ||
408 | movl %ebx, %edi | ||
409 | /* R2 33 */ | ||
410 | leal 2272392833(%edx,%ebp,1),%edx | ||
411 | addl %ebx, %eax | ||
412 | xorl %ecx, %edi | ||
413 | xorl %eax, %edi | ||
414 | movl 44(%esi), %ebp | ||
415 | addl %edi, %edx | ||
416 | movl %eax, %edi | ||
417 | roll $11, %edx | ||
418 | addl %eax, %edx | ||
419 | /* R2 34 */ | ||
420 | xorl %ebx, %edi | ||
421 | xorl %edx, %edi | ||
422 | leal 1839030562(%ecx,%ebp,1),%ecx | ||
423 | addl %edi, %ecx | ||
424 | movl 56(%esi), %ebp | ||
425 | roll $16, %ecx | ||
426 | movl %edx, %edi | ||
427 | /* R2 35 */ | ||
428 | leal 4259657740(%ebx,%ebp,1),%ebx | ||
429 | addl %edx, %ecx | ||
430 | xorl %eax, %edi | ||
431 | xorl %ecx, %edi | ||
432 | movl 4(%esi), %ebp | ||
433 | addl %edi, %ebx | ||
434 | movl %ecx, %edi | ||
435 | roll $23, %ebx | ||
436 | addl %ecx, %ebx | ||
437 | /* R2 36 */ | ||
438 | xorl %edx, %edi | ||
439 | xorl %ebx, %edi | ||
440 | leal 2763975236(%eax,%ebp,1),%eax | ||
441 | addl %edi, %eax | ||
442 | movl 16(%esi), %ebp | ||
443 | roll $4, %eax | ||
444 | movl %ebx, %edi | ||
445 | /* R2 37 */ | ||
446 | leal 1272893353(%edx,%ebp,1),%edx | ||
447 | addl %ebx, %eax | ||
448 | xorl %ecx, %edi | ||
449 | xorl %eax, %edi | ||
450 | movl 28(%esi), %ebp | ||
451 | addl %edi, %edx | ||
452 | movl %eax, %edi | ||
453 | roll $11, %edx | ||
454 | addl %eax, %edx | ||
455 | /* R2 38 */ | ||
456 | xorl %ebx, %edi | ||
457 | xorl %edx, %edi | ||
458 | leal 4139469664(%ecx,%ebp,1),%ecx | ||
459 | addl %edi, %ecx | ||
460 | movl 40(%esi), %ebp | ||
461 | roll $16, %ecx | ||
462 | movl %edx, %edi | ||
463 | /* R2 39 */ | ||
464 | leal 3200236656(%ebx,%ebp,1),%ebx | ||
465 | addl %edx, %ecx | ||
466 | xorl %eax, %edi | ||
467 | xorl %ecx, %edi | ||
468 | movl 52(%esi), %ebp | ||
469 | addl %edi, %ebx | ||
470 | movl %ecx, %edi | ||
471 | roll $23, %ebx | ||
472 | addl %ecx, %ebx | ||
473 | /* R2 40 */ | ||
474 | xorl %edx, %edi | ||
475 | xorl %ebx, %edi | ||
476 | leal 681279174(%eax,%ebp,1),%eax | ||
477 | addl %edi, %eax | ||
478 | movl (%esi), %ebp | ||
479 | roll $4, %eax | ||
480 | movl %ebx, %edi | ||
481 | /* R2 41 */ | ||
482 | leal 3936430074(%edx,%ebp,1),%edx | ||
483 | addl %ebx, %eax | ||
484 | xorl %ecx, %edi | ||
485 | xorl %eax, %edi | ||
486 | movl 12(%esi), %ebp | ||
487 | addl %edi, %edx | ||
488 | movl %eax, %edi | ||
489 | roll $11, %edx | ||
490 | addl %eax, %edx | ||
491 | /* R2 42 */ | ||
492 | xorl %ebx, %edi | ||
493 | xorl %edx, %edi | ||
494 | leal 3572445317(%ecx,%ebp,1),%ecx | ||
495 | addl %edi, %ecx | ||
496 | movl 24(%esi), %ebp | ||
497 | roll $16, %ecx | ||
498 | movl %edx, %edi | ||
499 | /* R2 43 */ | ||
500 | leal 76029189(%ebx,%ebp,1),%ebx | ||
501 | addl %edx, %ecx | ||
502 | xorl %eax, %edi | ||
503 | xorl %ecx, %edi | ||
504 | movl 36(%esi), %ebp | ||
505 | addl %edi, %ebx | ||
506 | movl %ecx, %edi | ||
507 | roll $23, %ebx | ||
508 | addl %ecx, %ebx | ||
509 | /* R2 44 */ | ||
510 | xorl %edx, %edi | ||
511 | xorl %ebx, %edi | ||
512 | leal 3654602809(%eax,%ebp,1),%eax | ||
513 | addl %edi, %eax | ||
514 | movl 48(%esi), %ebp | ||
515 | roll $4, %eax | ||
516 | movl %ebx, %edi | ||
517 | /* R2 45 */ | ||
518 | leal 3873151461(%edx,%ebp,1),%edx | ||
519 | addl %ebx, %eax | ||
520 | xorl %ecx, %edi | ||
521 | xorl %eax, %edi | ||
522 | movl 60(%esi), %ebp | ||
523 | addl %edi, %edx | ||
524 | movl %eax, %edi | ||
525 | roll $11, %edx | ||
526 | addl %eax, %edx | ||
527 | /* R2 46 */ | ||
528 | xorl %ebx, %edi | ||
529 | xorl %edx, %edi | ||
530 | leal 530742520(%ecx,%ebp,1),%ecx | ||
531 | addl %edi, %ecx | ||
532 | movl 8(%esi), %ebp | ||
533 | roll $16, %ecx | ||
534 | movl %edx, %edi | ||
535 | /* R2 47 */ | ||
536 | leal 3299628645(%ebx,%ebp,1),%ebx | ||
537 | addl %edx, %ecx | ||
538 | xorl %eax, %edi | ||
539 | xorl %ecx, %edi | ||
540 | movl (%esi), %ebp | ||
541 | addl %edi, %ebx | ||
542 | movl $-1, %edi | ||
543 | roll $23, %ebx | ||
544 | addl %ecx, %ebx | ||
545 | |||
546 | /* R3 section */ | ||
547 | /* R3 48 */ | ||
548 | xorl %edx, %edi | ||
549 | orl %ebx, %edi | ||
550 | leal 4096336452(%eax,%ebp,1),%eax | ||
551 | xorl %ecx, %edi | ||
552 | movl 28(%esi), %ebp | ||
553 | addl %edi, %eax | ||
554 | movl $-1, %edi | ||
555 | roll $6, %eax | ||
556 | xorl %ecx, %edi | ||
557 | addl %ebx, %eax | ||
558 | /* R3 49 */ | ||
559 | orl %eax, %edi | ||
560 | leal 1126891415(%edx,%ebp,1),%edx | ||
561 | xorl %ebx, %edi | ||
562 | movl 56(%esi), %ebp | ||
563 | addl %edi, %edx | ||
564 | movl $-1, %edi | ||
565 | roll $10, %edx | ||
566 | xorl %ebx, %edi | ||
567 | addl %eax, %edx | ||
568 | /* R3 50 */ | ||
569 | orl %edx, %edi | ||
570 | leal 2878612391(%ecx,%ebp,1),%ecx | ||
571 | xorl %eax, %edi | ||
572 | movl 20(%esi), %ebp | ||
573 | addl %edi, %ecx | ||
574 | movl $-1, %edi | ||
575 | roll $15, %ecx | ||
576 | xorl %eax, %edi | ||
577 | addl %edx, %ecx | ||
578 | /* R3 51 */ | ||
579 | orl %ecx, %edi | ||
580 | leal 4237533241(%ebx,%ebp,1),%ebx | ||
581 | xorl %edx, %edi | ||
582 | movl 48(%esi), %ebp | ||
583 | addl %edi, %ebx | ||
584 | movl $-1, %edi | ||
585 | roll $21, %ebx | ||
586 | xorl %edx, %edi | ||
587 | addl %ecx, %ebx | ||
588 | /* R3 52 */ | ||
589 | orl %ebx, %edi | ||
590 | leal 1700485571(%eax,%ebp,1),%eax | ||
591 | xorl %ecx, %edi | ||
592 | movl 12(%esi), %ebp | ||
593 | addl %edi, %eax | ||
594 | movl $-1, %edi | ||
595 | roll $6, %eax | ||
596 | xorl %ecx, %edi | ||
597 | addl %ebx, %eax | ||
598 | /* R3 53 */ | ||
599 | orl %eax, %edi | ||
600 | leal 2399980690(%edx,%ebp,1),%edx | ||
601 | xorl %ebx, %edi | ||
602 | movl 40(%esi), %ebp | ||
603 | addl %edi, %edx | ||
604 | movl $-1, %edi | ||
605 | roll $10, %edx | ||
606 | xorl %ebx, %edi | ||
607 | addl %eax, %edx | ||
608 | /* R3 54 */ | ||
609 | orl %edx, %edi | ||
610 | leal 4293915773(%ecx,%ebp,1),%ecx | ||
611 | xorl %eax, %edi | ||
612 | movl 4(%esi), %ebp | ||
613 | addl %edi, %ecx | ||
614 | movl $-1, %edi | ||
615 | roll $15, %ecx | ||
616 | xorl %eax, %edi | ||
617 | addl %edx, %ecx | ||
618 | /* R3 55 */ | ||
619 | orl %ecx, %edi | ||
620 | leal 2240044497(%ebx,%ebp,1),%ebx | ||
621 | xorl %edx, %edi | ||
622 | movl 32(%esi), %ebp | ||
623 | addl %edi, %ebx | ||
624 | movl $-1, %edi | ||
625 | roll $21, %ebx | ||
626 | xorl %edx, %edi | ||
627 | addl %ecx, %ebx | ||
628 | /* R3 56 */ | ||
629 | orl %ebx, %edi | ||
630 | leal 1873313359(%eax,%ebp,1),%eax | ||
631 | xorl %ecx, %edi | ||
632 | movl 60(%esi), %ebp | ||
633 | addl %edi, %eax | ||
634 | movl $-1, %edi | ||
635 | roll $6, %eax | ||
636 | xorl %ecx, %edi | ||
637 | addl %ebx, %eax | ||
638 | /* R3 57 */ | ||
639 | orl %eax, %edi | ||
640 | leal 4264355552(%edx,%ebp,1),%edx | ||
641 | xorl %ebx, %edi | ||
642 | movl 24(%esi), %ebp | ||
643 | addl %edi, %edx | ||
644 | movl $-1, %edi | ||
645 | roll $10, %edx | ||
646 | xorl %ebx, %edi | ||
647 | addl %eax, %edx | ||
648 | /* R3 58 */ | ||
649 | orl %edx, %edi | ||
650 | leal 2734768916(%ecx,%ebp,1),%ecx | ||
651 | xorl %eax, %edi | ||
652 | movl 52(%esi), %ebp | ||
653 | addl %edi, %ecx | ||
654 | movl $-1, %edi | ||
655 | roll $15, %ecx | ||
656 | xorl %eax, %edi | ||
657 | addl %edx, %ecx | ||
658 | /* R3 59 */ | ||
659 | orl %ecx, %edi | ||
660 | leal 1309151649(%ebx,%ebp,1),%ebx | ||
661 | xorl %edx, %edi | ||
662 | movl 16(%esi), %ebp | ||
663 | addl %edi, %ebx | ||
664 | movl $-1, %edi | ||
665 | roll $21, %ebx | ||
666 | xorl %edx, %edi | ||
667 | addl %ecx, %ebx | ||
668 | /* R3 60 */ | ||
669 | orl %ebx, %edi | ||
670 | leal 4149444226(%eax,%ebp,1),%eax | ||
671 | xorl %ecx, %edi | ||
672 | movl 44(%esi), %ebp | ||
673 | addl %edi, %eax | ||
674 | movl $-1, %edi | ||
675 | roll $6, %eax | ||
676 | xorl %ecx, %edi | ||
677 | addl %ebx, %eax | ||
678 | /* R3 61 */ | ||
679 | orl %eax, %edi | ||
680 | leal 3174756917(%edx,%ebp,1),%edx | ||
681 | xorl %ebx, %edi | ||
682 | movl 8(%esi), %ebp | ||
683 | addl %edi, %edx | ||
684 | movl $-1, %edi | ||
685 | roll $10, %edx | ||
686 | xorl %ebx, %edi | ||
687 | addl %eax, %edx | ||
688 | /* R3 62 */ | ||
689 | orl %edx, %edi | ||
690 | leal 718787259(%ecx,%ebp,1),%ecx | ||
691 | xorl %eax, %edi | ||
692 | movl 36(%esi), %ebp | ||
693 | addl %edi, %ecx | ||
694 | movl $-1, %edi | ||
695 | roll $15, %ecx | ||
696 | xorl %eax, %edi | ||
697 | addl %edx, %ecx | ||
698 | /* R3 63 */ | ||
699 | orl %ecx, %edi | ||
700 | leal 3951481745(%ebx,%ebp,1),%ebx | ||
701 | xorl %edx, %edi | ||
702 | movl 24(%esp), %ebp | ||
703 | addl %edi, %ebx | ||
704 | addl $64, %esi | ||
705 | roll $21, %ebx | ||
706 | movl (%ebp), %edi | ||
707 | addl %ecx, %ebx | ||
708 | addl %edi, %eax | ||
709 | movl 4(%ebp), %edi | ||
710 | addl %edi, %ebx | ||
711 | movl 8(%ebp), %edi | ||
712 | addl %edi, %ecx | ||
713 | movl 12(%ebp), %edi | ||
714 | addl %edi, %edx | ||
715 | movl %eax, (%ebp) | ||
716 | movl %ebx, 4(%ebp) | ||
717 | movl (%esp), %edi | ||
718 | movl %ecx, 8(%ebp) | ||
719 | movl %edx, 12(%ebp) | ||
720 | cmpl %esi, %edi | ||
721 | jge .L000start | ||
722 | popl %eax | ||
723 | popl %ebx | ||
724 | popl %ebp | ||
725 | popl %edi | ||
726 | popl %esi | ||
727 | ret | ||
728 | .md5_block_x86_end: | ||
729 | SIZE(md5_block_x86,.md5_block_x86_end-md5_block_x86) | ||
730 | .ident "desasm.pl" | ||