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-rw-r--r--src/lib/libcrypto/rc4/asm/rc4-586.pl388
-rwxr-xr-xsrc/lib/libcrypto/rc4/asm/rc4-x86_64.pl522
-rw-r--r--src/lib/libcrypto/rc4/rc4.c305
-rw-r--r--src/lib/libcrypto/rc4/rc4.h83
4 files changed, 0 insertions, 1298 deletions
diff --git a/src/lib/libcrypto/rc4/asm/rc4-586.pl b/src/lib/libcrypto/rc4/asm/rc4-586.pl
deleted file mode 100644
index 8fffe91e74..0000000000
--- a/src/lib/libcrypto/rc4/asm/rc4-586.pl
+++ /dev/null
@@ -1,388 +0,0 @@
1#!/usr/bin/env perl
2
3# ====================================================================
4# [Re]written by Andy Polyakov <appro@fy.chalmers.se> for the OpenSSL
5# project. The module is, however, dual licensed under OpenSSL and
6# CRYPTOGAMS licenses depending on where you obtain it. For further
7# details see http://www.openssl.org/~appro/cryptogams/.
8# ====================================================================
9
10# At some point it became apparent that the original SSLeay RC4
11# assembler implementation performs suboptimally on latest IA-32
12# microarchitectures. After re-tuning performance has changed as
13# following:
14#
15# Pentium -10%
16# Pentium III +12%
17# AMD +50%(*)
18# P4 +250%(**)
19#
20# (*) This number is actually a trade-off:-) It's possible to
21# achieve +72%, but at the cost of -48% off PIII performance.
22# In other words code performing further 13% faster on AMD
23# would perform almost 2 times slower on Intel PIII...
24# For reference! This code delivers ~80% of rc4-amd64.pl
25# performance on the same Opteron machine.
26# (**) This number requires compressed key schedule set up by
27# RC4_set_key [see commentary below for further details].
28#
29# <appro@fy.chalmers.se>
30
31# May 2011
32#
33# Optimize for Core2 and Westmere [and incidentally Opteron]. Current
34# performance in cycles per processed byte (less is better) and
35# improvement relative to previous version of this module is:
36#
37# Pentium 10.2 # original numbers
38# Pentium III 7.8(*)
39# Intel P4 7.5
40#
41# Opteron 6.1/+20% # new MMX numbers
42# Core2 5.3/+67%(**)
43# Westmere 5.1/+94%(**)
44# Sandy Bridge 5.0/+8%
45# Atom 12.6/+6%
46#
47# (*) PIII can actually deliver 6.6 cycles per byte with MMX code,
48# but this specific code performs poorly on Core2. And vice
49# versa, below MMX/SSE code delivering 5.8/7.1 on Core2 performs
50# poorly on PIII, at 8.0/14.5:-( As PIII is not a "hot" CPU
51# [anymore], I chose to discard PIII-specific code path and opt
52# for original IALU-only code, which is why MMX/SSE code path
53# is guarded by SSE2 bit (see below), not MMX/SSE.
54# (**) Performance vs. block size on Core2 and Westmere had a maximum
55# at ... 64 bytes block size. And it was quite a maximum, 40-60%
56# in comparison to largest 8KB block size. Above improvement
57# coefficients are for the largest block size.
58
59$0 =~ m/(.*[\/\\])[^\/\\]+$/; $dir=$1;
60push(@INC,"${dir}","${dir}../../perlasm");
61require "x86asm.pl";
62
63&asm_init($ARGV[0],"rc4-586.pl");
64
65$xx="eax";
66$yy="ebx";
67$tx="ecx";
68$ty="edx";
69$inp="esi";
70$out="ebp";
71$dat="edi";
72
73sub RC4_loop {
74 my $i=shift;
75 my $func = ($i==0)?*mov:*or;
76
77 &add (&LB($yy),&LB($tx));
78 &mov ($ty,&DWP(0,$dat,$yy,4));
79 &mov (&DWP(0,$dat,$yy,4),$tx);
80 &mov (&DWP(0,$dat,$xx,4),$ty);
81 &add ($ty,$tx);
82 &inc (&LB($xx));
83 &and ($ty,0xff);
84 &ror ($out,8) if ($i!=0);
85 if ($i<3) {
86 &mov ($tx,&DWP(0,$dat,$xx,4));
87 } else {
88 &mov ($tx,&wparam(3)); # reload [re-biased] out
89 }
90 &$func ($out,&DWP(0,$dat,$ty,4));
91}
92
93if ($alt=0) {
94 # >20% faster on Atom and Sandy Bridge[!], 8% faster on Opteron,
95 # but ~40% slower on Core2 and Westmere... Attempt to add movz
96 # brings down Opteron by 25%, Atom and Sandy Bridge by 15%, yet
97 # on Core2 with movz it's almost 20% slower than below alternative
98 # code... Yes, it's a total mess...
99 my @XX=($xx,$out);
100 $RC4_loop_mmx = sub { # SSE actually...
101 my $i=shift;
102 my $j=$i<=0?0:$i>>1;
103 my $mm=$i<=0?"mm0":"mm".($i&1);
104
105 &add (&LB($yy),&LB($tx));
106 &lea (@XX[1],&DWP(1,@XX[0]));
107 &pxor ("mm2","mm0") if ($i==0);
108 &psllq ("mm1",8) if ($i==0);
109 &and (@XX[1],0xff);
110 &pxor ("mm0","mm0") if ($i<=0);
111 &mov ($ty,&DWP(0,$dat,$yy,4));
112 &mov (&DWP(0,$dat,$yy,4),$tx);
113 &pxor ("mm1","mm2") if ($i==0);
114 &mov (&DWP(0,$dat,$XX[0],4),$ty);
115 &add (&LB($ty),&LB($tx));
116 &movd (@XX[0],"mm7") if ($i==0);
117 &mov ($tx,&DWP(0,$dat,@XX[1],4));
118 &pxor ("mm1","mm1") if ($i==1);
119 &movq ("mm2",&QWP(0,$inp)) if ($i==1);
120 &movq (&QWP(-8,(@XX[0],$inp)),"mm1") if ($i==0);
121 &pinsrw ($mm,&DWP(0,$dat,$ty,4),$j);
122
123 push (@XX,shift(@XX)) if ($i>=0);
124 }
125} else {
126 # Using pinsrw here improves performance on Intel CPUs by 2-3%, but
127 # brings down AMD by 7%...
128 $RC4_loop_mmx = sub {
129 my $i=shift;
130
131 &add (&LB($yy),&LB($tx));
132 &psllq ("mm1",8*(($i-1)&7)) if (abs($i)!=1);
133 &mov ($ty,&DWP(0,$dat,$yy,4));
134 &mov (&DWP(0,$dat,$yy,4),$tx);
135 &mov (&DWP(0,$dat,$xx,4),$ty);
136 &inc ($xx);
137 &add ($ty,$tx);
138 &movz ($xx,&LB($xx)); # (*)
139 &movz ($ty,&LB($ty)); # (*)
140 &pxor ("mm2",$i==1?"mm0":"mm1") if ($i>=0);
141 &movq ("mm0",&QWP(0,$inp)) if ($i<=0);
142 &movq (&QWP(-8,($out,$inp)),"mm2") if ($i==0);
143 &mov ($tx,&DWP(0,$dat,$xx,4));
144 &movd ($i>0?"mm1":"mm2",&DWP(0,$dat,$ty,4));
145
146 # (*) This is the key to Core2 and Westmere performance.
147 # Without movz out-of-order execution logic confuses
148 # itself and fails to reorder loads and stores. Problem
149 # appears to be fixed in Sandy Bridge...
150 }
151}
152
153&external_label("OPENSSL_ia32cap_P");
154
155# void rc4_internal(RC4_KEY *key, size_t len, const unsigned char *inp,
156# unsigned char *out);
157&function_begin("rc4_internal");
158 &mov ($dat,&wparam(0)); # load key schedule pointer
159 &mov ($ty, &wparam(1)); # load len
160 &mov ($inp,&wparam(2)); # load inp
161 &mov ($out,&wparam(3)); # load out
162
163 &xor ($xx,$xx); # avoid partial register stalls
164 &xor ($yy,$yy);
165
166 &cmp ($ty,0); # safety net
167 &je (&label("abort"));
168
169 &mov (&LB($xx),&BP(0,$dat)); # load key->x
170 &mov (&LB($yy),&BP(4,$dat)); # load key->y
171 &add ($dat,8);
172
173 &lea ($tx,&DWP(0,$inp,$ty));
174 &sub ($out,$inp); # re-bias out
175 &mov (&wparam(1),$tx); # save input+len
176
177 &inc (&LB($xx));
178
179 # detect compressed key schedule...
180 &cmp (&DWP(256,$dat),-1);
181 &je (&label("RC4_CHAR"));
182
183 &mov ($tx,&DWP(0,$dat,$xx,4));
184
185 &and ($ty,-4); # how many 4-byte chunks?
186 &jz (&label("loop1"));
187
188 &test ($ty,-8);
189 &mov (&wparam(3),$out); # $out as accumulator in these loops
190 &jz (&label("go4loop4"));
191
192 &picsetup($out);
193 &picsymbol($out, "OPENSSL_ia32cap_P", $out);
194 # check SSE2 bit [could have been MMX]
195 &bt (&DWP(0,$out),"\$IA32CAP_BIT0_SSE2");
196 &jnc (&label("go4loop4"));
197
198 &mov ($out,&wparam(3)) if (!$alt);
199 &movd ("mm7",&wparam(3)) if ($alt);
200 &and ($ty,-8);
201 &lea ($ty,&DWP(-8,$inp,$ty));
202 &mov (&DWP(-4,$dat),$ty); # save input+(len/8)*8-8
203
204 &$RC4_loop_mmx(-1);
205 &jmp(&label("loop_mmx_enter"));
206
207 &set_label("loop_mmx",16);
208 &$RC4_loop_mmx(0);
209 &set_label("loop_mmx_enter");
210 for ($i=1;$i<8;$i++) { &$RC4_loop_mmx($i); }
211 &mov ($ty,$yy);
212 &xor ($yy,$yy); # this is second key to Core2
213 &mov (&LB($yy),&LB($ty)); # and Westmere performance...
214 &cmp ($inp,&DWP(-4,$dat));
215 &lea ($inp,&DWP(8,$inp));
216 &jb (&label("loop_mmx"));
217
218 if ($alt) {
219 &movd ($out,"mm7");
220 &pxor ("mm2","mm0");
221 &psllq ("mm1",8);
222 &pxor ("mm1","mm2");
223 &movq (&QWP(-8,$out,$inp),"mm1");
224 } else {
225 &psllq ("mm1",56);
226 &pxor ("mm2","mm1");
227 &movq (&QWP(-8,$out,$inp),"mm2");
228 }
229 &emms ();
230
231 &cmp ($inp,&wparam(1)); # compare to input+len
232 &je (&label("done"));
233 &jmp (&label("loop1"));
234
235&set_label("go4loop4",16);
236 &lea ($ty,&DWP(-4,$inp,$ty));
237 &mov (&wparam(2),$ty); # save input+(len/4)*4-4
238
239 &set_label("loop4");
240 for ($i=0;$i<4;$i++) { RC4_loop($i); }
241 &ror ($out,8);
242 &xor ($out,&DWP(0,$inp));
243 &cmp ($inp,&wparam(2)); # compare to input+(len/4)*4-4
244 &mov (&DWP(0,$tx,$inp),$out);# $tx holds re-biased out here
245 &lea ($inp,&DWP(4,$inp));
246 &mov ($tx,&DWP(0,$dat,$xx,4));
247 &jb (&label("loop4"));
248
249 &cmp ($inp,&wparam(1)); # compare to input+len
250 &je (&label("done"));
251 &mov ($out,&wparam(3)); # restore $out
252
253 &set_label("loop1",16);
254 &add (&LB($yy),&LB($tx));
255 &mov ($ty,&DWP(0,$dat,$yy,4));
256 &mov (&DWP(0,$dat,$yy,4),$tx);
257 &mov (&DWP(0,$dat,$xx,4),$ty);
258 &add ($ty,$tx);
259 &inc (&LB($xx));
260 &and ($ty,0xff);
261 &mov ($ty,&DWP(0,$dat,$ty,4));
262 &xor (&LB($ty),&BP(0,$inp));
263 &lea ($inp,&DWP(1,$inp));
264 &mov ($tx,&DWP(0,$dat,$xx,4));
265 &cmp ($inp,&wparam(1)); # compare to input+len
266 &mov (&BP(-1,$out,$inp),&LB($ty));
267 &jb (&label("loop1"));
268
269 &jmp (&label("done"));
270
271# this is essentially Intel P4 specific codepath...
272&set_label("RC4_CHAR",16);
273 &movz ($tx,&BP(0,$dat,$xx));
274 # strangely enough unrolled loop performs over 20% slower...
275 &set_label("cloop1");
276 &add (&LB($yy),&LB($tx));
277 &movz ($ty,&BP(0,$dat,$yy));
278 &mov (&BP(0,$dat,$yy),&LB($tx));
279 &mov (&BP(0,$dat,$xx),&LB($ty));
280 &add (&LB($ty),&LB($tx));
281 &movz ($ty,&BP(0,$dat,$ty));
282 &add (&LB($xx),1);
283 &xor (&LB($ty),&BP(0,$inp));
284 &lea ($inp,&DWP(1,$inp));
285 &movz ($tx,&BP(0,$dat,$xx));
286 &cmp ($inp,&wparam(1));
287 &mov (&BP(-1,$out,$inp),&LB($ty));
288 &jb (&label("cloop1"));
289
290&set_label("done");
291 &dec (&LB($xx));
292 &mov (&DWP(-4,$dat),$yy); # save key->y
293 &mov (&BP(-8,$dat),&LB($xx)); # save key->x
294&set_label("abort");
295&function_end("rc4_internal");
296
297########################################################################
298
299$inp="esi";
300$out="edi";
301$idi="ebp";
302$ido="ecx";
303$idx="edx";
304
305# void rc4_set_key_internal(RC4_KEY *key,int len,const unsigned char *data);
306&function_begin("rc4_set_key_internal");
307 &mov ($out,&wparam(0)); # load key
308 &mov ($idi,&wparam(1)); # load len
309 &mov ($inp,&wparam(2)); # load data
310
311 &picsetup($idx);
312 &picsymbol($idx, "OPENSSL_ia32cap_P", $idx);
313
314 &lea ($out,&DWP(2*4,$out)); # &key->data
315 &lea ($inp,&DWP(0,$inp,$idi)); # $inp to point at the end
316 &neg ($idi);
317 &xor ("eax","eax");
318 &mov (&DWP(-4,$out),$idi); # borrow key->y
319
320 &bt (&DWP(0,$idx),"\$IA32CAP_BIT0_INTELP4");
321 &jc (&label("c1stloop"));
322
323&set_label("w1stloop",16);
324 &mov (&DWP(0,$out,"eax",4),"eax"); # key->data[i]=i;
325 &add (&LB("eax"),1); # i++;
326 &jnc (&label("w1stloop"));
327
328 &xor ($ido,$ido);
329 &xor ($idx,$idx);
330
331&set_label("w2ndloop",16);
332 &mov ("eax",&DWP(0,$out,$ido,4));
333 &add (&LB($idx),&BP(0,$inp,$idi));
334 &add (&LB($idx),&LB("eax"));
335 &add ($idi,1);
336 &mov ("ebx",&DWP(0,$out,$idx,4));
337 &jnz (&label("wnowrap"));
338 &mov ($idi,&DWP(-4,$out));
339 &set_label("wnowrap");
340 &mov (&DWP(0,$out,$idx,4),"eax");
341 &mov (&DWP(0,$out,$ido,4),"ebx");
342 &add (&LB($ido),1);
343 &jnc (&label("w2ndloop"));
344&jmp (&label("exit"));
345
346# Unlike all other x86 [and x86_64] implementations, Intel P4 core
347# [including EM64T] was found to perform poorly with above "32-bit" key
348# schedule, a.k.a. RC4_INT. Performance improvement for IA-32 hand-coded
349# assembler turned out to be 3.5x if re-coded for compressed 8-bit one,
350# a.k.a. RC4_CHAR! It's however inappropriate to just switch to 8-bit
351# schedule for x86[_64], because non-P4 implementations suffer from
352# significant performance losses then, e.g. PIII exhibits >2x
353# deterioration, and so does Opteron. In order to assure optimal
354# all-round performance, we detect P4 at run-time and set up compressed
355# key schedule, which is recognized by RC4 procedure.
356
357&set_label("c1stloop",16);
358 &mov (&BP(0,$out,"eax"),&LB("eax")); # key->data[i]=i;
359 &add (&LB("eax"),1); # i++;
360 &jnc (&label("c1stloop"));
361
362 &xor ($ido,$ido);
363 &xor ($idx,$idx);
364 &xor ("ebx","ebx");
365
366&set_label("c2ndloop",16);
367 &mov (&LB("eax"),&BP(0,$out,$ido));
368 &add (&LB($idx),&BP(0,$inp,$idi));
369 &add (&LB($idx),&LB("eax"));
370 &add ($idi,1);
371 &mov (&LB("ebx"),&BP(0,$out,$idx));
372 &jnz (&label("cnowrap"));
373 &mov ($idi,&DWP(-4,$out));
374 &set_label("cnowrap");
375 &mov (&BP(0,$out,$idx),&LB("eax"));
376 &mov (&BP(0,$out,$ido),&LB("ebx"));
377 &add (&LB($ido),1);
378 &jnc (&label("c2ndloop"));
379
380 &mov (&DWP(256,$out),-1); # mark schedule as compressed
381
382&set_label("exit");
383 &xor ("eax","eax");
384 &mov (&DWP(-8,$out),"eax"); # key->x=0;
385 &mov (&DWP(-4,$out),"eax"); # key->y=0;
386&function_end("rc4_set_key_internal");
387
388&asm_finish();
diff --git a/src/lib/libcrypto/rc4/asm/rc4-x86_64.pl b/src/lib/libcrypto/rc4/asm/rc4-x86_64.pl
deleted file mode 100755
index 4dfce6a9ad..0000000000
--- a/src/lib/libcrypto/rc4/asm/rc4-x86_64.pl
+++ /dev/null
@@ -1,522 +0,0 @@
1#!/usr/bin/env perl
2#
3# ====================================================================
4# Written by Andy Polyakov <appro@fy.chalmers.se> for the OpenSSL
5# project. The module is, however, dual licensed under OpenSSL and
6# CRYPTOGAMS licenses depending on where you obtain it. For further
7# details see http://www.openssl.org/~appro/cryptogams/.
8# ====================================================================
9#
10# July 2004
11#
12# 2.22x RC4 tune-up:-) It should be noted though that my hand [as in
13# "hand-coded assembler"] doesn't stand for the whole improvement
14# coefficient. It turned out that eliminating RC4_CHAR from config
15# line results in ~40% improvement (yes, even for C implementation).
16# Presumably it has everything to do with AMD cache architecture and
17# RAW or whatever penalties. Once again! The module *requires* config
18# line *without* RC4_CHAR! As for coding "secret," I bet on partial
19# register arithmetics. For example instead of 'inc %r8; and $255,%r8'
20# I simply 'inc %r8b'. Even though optimization manual discourages
21# to operate on partial registers, it turned out to be the best bet.
22# At least for AMD... How IA32E would perform remains to be seen...
23
24# November 2004
25#
26# As was shown by Marc Bevand reordering of couple of load operations
27# results in even higher performance gain of 3.3x:-) At least on
28# Opteron... For reference, 1x in this case is RC4_CHAR C-code
29# compiled with gcc 3.3.2, which performs at ~54MBps per 1GHz clock.
30# Latter means that if you want to *estimate* what to expect from
31# *your* Opteron, then multiply 54 by 3.3 and clock frequency in GHz.
32
33# November 2004
34#
35# Intel P4 EM64T core was found to run the AMD64 code really slow...
36# The only way to achieve comparable performance on P4 was to keep
37# RC4_CHAR. Kind of ironic, huh? As it's apparently impossible to
38# compose blended code, which would perform even within 30% marginal
39# on either AMD and Intel platforms, I implement both cases. See
40# rc4_skey.c for further details...
41
42# April 2005
43#
44# P4 EM64T core appears to be "allergic" to 64-bit inc/dec. Replacing
45# those with add/sub results in 50% performance improvement of folded
46# loop...
47
48# May 2005
49#
50# As was shown by Zou Nanhai loop unrolling can improve Intel EM64T
51# performance by >30% [unlike P4 32-bit case that is]. But this is
52# provided that loads are reordered even more aggressively! Both code
53# paths, AMD64 and EM64T, reorder loads in essentially same manner
54# as my IA-64 implementation. On Opteron this resulted in modest 5%
55# improvement [I had to test it], while final Intel P4 performance
56# achieves respectful 432MBps on 2.8GHz processor now. For reference.
57# If executed on Xeon, current RC4_CHAR code-path is 2.7x faster than
58# RC4_INT code-path. While if executed on Opteron, it's only 25%
59# slower than the RC4_INT one [meaning that if CPU µ-arch detection
60# is not implemented, then this final RC4_CHAR code-path should be
61# preferred, as it provides better *all-round* performance].
62
63# March 2007
64#
65# Intel Core2 was observed to perform poorly on both code paths:-( It
66# apparently suffers from some kind of partial register stall, which
67# occurs in 64-bit mode only [as virtually identical 32-bit loop was
68# observed to outperform 64-bit one by almost 50%]. Adding two movzb to
69# cloop1 boosts its performance by 80%! This loop appears to be optimal
70# fit for Core2 and therefore the code was modified to skip cloop8 on
71# this CPU.
72
73# May 2010
74#
75# Intel Westmere was observed to perform suboptimally. Adding yet
76# another movzb to cloop1 improved performance by almost 50%! Core2
77# performance is improved too, but nominally...
78
79# May 2011
80#
81# The only code path that was not modified is P4-specific one. Non-P4
82# Intel code path optimization is heavily based on submission by Maxim
83# Perminov, Maxim Locktyukhin and Jim Guilford of Intel. I've used
84# some of the ideas even in attempt to optimize the original RC4_INT
85# code path... Current performance in cycles per processed byte (less
86# is better) and improvement coefficients relative to previous
87# version of this module are:
88#
89# Opteron 5.3/+0%(*)
90# P4 6.5
91# Core2 6.2/+15%(**)
92# Westmere 4.2/+60%
93# Sandy Bridge 4.2/+120%
94# Atom 9.3/+80%
95#
96# (*) But corresponding loop has less instructions, which should have
97# positive effect on upcoming Bulldozer, which has one less ALU.
98# For reference, Intel code runs at 6.8 cpb rate on Opteron.
99# (**) Note that Core2 result is ~15% lower than corresponding result
100# for 32-bit code, meaning that it's possible to improve it,
101# but more than likely at the cost of the others (see rc4-586.pl
102# to get the idea)...
103
104$flavour = shift;
105$output = shift;
106if ($flavour =~ /\./) { $output = $flavour; undef $flavour; }
107
108$0 =~ m/(.*[\/\\])[^\/\\]+$/; $dir=$1;
109( $xlate="${dir}x86_64-xlate.pl" and -f $xlate ) or
110( $xlate="${dir}../../perlasm/x86_64-xlate.pl" and -f $xlate) or
111die "can't locate x86_64-xlate.pl";
112
113open OUT,"| \"$^X\" $xlate $flavour $output";
114*STDOUT=*OUT;
115
116$dat="%rdi"; # arg1
117$len="%rsi"; # arg2
118$inp="%rdx"; # arg3
119$out="%rcx"; # arg4
120
121{
122$code=<<___;
123.text
124.extern OPENSSL_ia32cap_P
125.hidden OPENSSL_ia32cap_P
126
127.globl rc4_internal
128.type rc4_internal,\@function,4
129.align 16
130rc4_internal:
131 _CET_ENDBR
132 or $len,$len
133 jne .Lentry
134 ret
135.Lentry:
136 push %rbx
137 push %r12
138 push %r13
139.Lprologue:
140 mov $len,%r11
141 mov $inp,%r12
142 mov $out,%r13
143___
144my $len="%r11"; # reassign input arguments
145my $inp="%r12";
146my $out="%r13";
147
148my @XX=("%r10","%rsi");
149my @TX=("%rax","%rbx");
150my $YY="%rcx";
151my $TY="%rdx";
152
153$code.=<<___;
154 xor $XX[0],$XX[0]
155 xor $YY,$YY
156
157 lea 8($dat),$dat
158 mov -8($dat),$XX[0]#b
159 mov -4($dat),$YY#b
160 cmpl \$-1,256($dat)
161 je .LRC4_CHAR
162 mov OPENSSL_ia32cap_P(%rip),%r8d
163 xor $TX[1],$TX[1]
164 inc $XX[0]#b
165 sub $XX[0],$TX[1]
166 sub $inp,$out
167 movl ($dat,$XX[0],4),$TX[0]#d
168 test \$-16,$len
169 jz .Lloop1
170 bt \$IA32CAP_BIT0_INTEL,%r8d # Intel CPU?
171 jc .Lintel
172 and \$7,$TX[1]
173 lea 1($XX[0]),$XX[1]
174 jz .Loop8
175 sub $TX[1],$len
176.Loop8_warmup:
177 add $TX[0]#b,$YY#b
178 movl ($dat,$YY,4),$TY#d
179 movl $TX[0]#d,($dat,$YY,4)
180 movl $TY#d,($dat,$XX[0],4)
181 add $TY#b,$TX[0]#b
182 inc $XX[0]#b
183 movl ($dat,$TX[0],4),$TY#d
184 movl ($dat,$XX[0],4),$TX[0]#d
185 xorb ($inp),$TY#b
186 movb $TY#b,($out,$inp)
187 lea 1($inp),$inp
188 dec $TX[1]
189 jnz .Loop8_warmup
190
191 lea 1($XX[0]),$XX[1]
192 jmp .Loop8
193.align 16
194.Loop8:
195___
196for ($i=0;$i<8;$i++) {
197$code.=<<___ if ($i==7);
198 add \$8,$XX[1]#b
199___
200$code.=<<___;
201 add $TX[0]#b,$YY#b
202 movl ($dat,$YY,4),$TY#d
203 movl $TX[0]#d,($dat,$YY,4)
204 movl `4*($i==7?-1:$i)`($dat,$XX[1],4),$TX[1]#d
205 ror \$8,%r8 # ror is redundant when $i=0
206 movl $TY#d,4*$i($dat,$XX[0],4)
207 add $TX[0]#b,$TY#b
208 movb ($dat,$TY,4),%r8b
209___
210push(@TX,shift(@TX)); #push(@XX,shift(@XX)); # "rotate" registers
211}
212$code.=<<___;
213 add \$8,$XX[0]#b
214 ror \$8,%r8
215 sub \$8,$len
216
217 xor ($inp),%r8
218 mov %r8,($out,$inp)
219 lea 8($inp),$inp
220
221 test \$-8,$len
222 jnz .Loop8
223 cmp \$0,$len
224 jne .Lloop1
225 jmp .Lexit
226
227.align 16
228.Lintel:
229 test \$-32,$len
230 jz .Lloop1
231 and \$15,$TX[1]
232 jz .Loop16_is_hot
233 sub $TX[1],$len
234.Loop16_warmup:
235 add $TX[0]#b,$YY#b
236 movl ($dat,$YY,4),$TY#d
237 movl $TX[0]#d,($dat,$YY,4)
238 movl $TY#d,($dat,$XX[0],4)
239 add $TY#b,$TX[0]#b
240 inc $XX[0]#b
241 movl ($dat,$TX[0],4),$TY#d
242 movl ($dat,$XX[0],4),$TX[0]#d
243 xorb ($inp),$TY#b
244 movb $TY#b,($out,$inp)
245 lea 1($inp),$inp
246 dec $TX[1]
247 jnz .Loop16_warmup
248
249 mov $YY,$TX[1]
250 xor $YY,$YY
251 mov $TX[1]#b,$YY#b
252
253.Loop16_is_hot:
254 lea ($dat,$XX[0],4),$XX[1]
255___
256sub RC4_loop {
257 my $i=shift;
258 my $j=$i<0?0:$i;
259 my $xmm="%xmm".($j&1);
260
261 $code.=" add \$16,$XX[0]#b\n" if ($i==15);
262 $code.=" movdqu ($inp),%xmm2\n" if ($i==15);
263 $code.=" add $TX[0]#b,$YY#b\n" if ($i<=0);
264 $code.=" movl ($dat,$YY,4),$TY#d\n";
265 $code.=" pxor %xmm0,%xmm2\n" if ($i==0);
266 $code.=" psllq \$8,%xmm1\n" if ($i==0);
267 $code.=" pxor $xmm,$xmm\n" if ($i<=1);
268 $code.=" movl $TX[0]#d,($dat,$YY,4)\n";
269 $code.=" add $TY#b,$TX[0]#b\n";
270 $code.=" movl `4*($j+1)`($XX[1]),$TX[1]#d\n" if ($i<15);
271 $code.=" movz $TX[0]#b,$TX[0]#d\n";
272 $code.=" movl $TY#d,4*$j($XX[1])\n";
273 $code.=" pxor %xmm1,%xmm2\n" if ($i==0);
274 $code.=" lea ($dat,$XX[0],4),$XX[1]\n" if ($i==15);
275 $code.=" add $TX[1]#b,$YY#b\n" if ($i<15);
276 $code.=" pinsrw \$`($j>>1)&7`,($dat,$TX[0],4),$xmm\n";
277 $code.=" movdqu %xmm2,($out,$inp)\n" if ($i==0);
278 $code.=" lea 16($inp),$inp\n" if ($i==0);
279 $code.=" movl ($XX[1]),$TX[1]#d\n" if ($i==15);
280}
281 RC4_loop(-1);
282$code.=<<___;
283 jmp .Loop16_enter
284.align 16
285.Loop16:
286___
287
288for ($i=0;$i<16;$i++) {
289 $code.=".Loop16_enter:\n" if ($i==1);
290 RC4_loop($i);
291 push(@TX,shift(@TX)); # "rotate" registers
292}
293$code.=<<___;
294 mov $YY,$TX[1]
295 xor $YY,$YY # keyword to partial register
296 sub \$16,$len
297 mov $TX[1]#b,$YY#b
298 test \$-16,$len
299 jnz .Loop16
300
301 psllq \$8,%xmm1
302 pxor %xmm0,%xmm2
303 pxor %xmm1,%xmm2
304 movdqu %xmm2,($out,$inp)
305 lea 16($inp),$inp
306
307 cmp \$0,$len
308 jne .Lloop1
309 jmp .Lexit
310
311.align 16
312.Lloop1:
313 add $TX[0]#b,$YY#b
314 movl ($dat,$YY,4),$TY#d
315 movl $TX[0]#d,($dat,$YY,4)
316 movl $TY#d,($dat,$XX[0],4)
317 add $TY#b,$TX[0]#b
318 inc $XX[0]#b
319 movl ($dat,$TX[0],4),$TY#d
320 movl ($dat,$XX[0],4),$TX[0]#d
321 xorb ($inp),$TY#b
322 movb $TY#b,($out,$inp)
323 lea 1($inp),$inp
324 dec $len
325 jnz .Lloop1
326 jmp .Lexit
327
328.align 16
329.LRC4_CHAR:
330 add \$1,$XX[0]#b
331 movzb ($dat,$XX[0]),$TX[0]#d
332 test \$-8,$len
333 jz .Lcloop1
334 jmp .Lcloop8
335.align 16
336.Lcloop8:
337 mov ($inp),%r8d
338 mov 4($inp),%r9d
339___
340# unroll 2x4-wise, because 64-bit rotates kill Intel P4...
341for ($i=0;$i<4;$i++) {
342$code.=<<___;
343 add $TX[0]#b,$YY#b
344 lea 1($XX[0]),$XX[1]
345 movzb ($dat,$YY),$TY#d
346 movzb $XX[1]#b,$XX[1]#d
347 movzb ($dat,$XX[1]),$TX[1]#d
348 movb $TX[0]#b,($dat,$YY)
349 cmp $XX[1],$YY
350 movb $TY#b,($dat,$XX[0])
351 jne .Lcmov$i # Intel cmov is sloooow...
352 mov $TX[0],$TX[1]
353.Lcmov$i:
354 add $TX[0]#b,$TY#b
355 xor ($dat,$TY),%r8b
356 ror \$8,%r8d
357___
358push(@TX,shift(@TX)); push(@XX,shift(@XX)); # "rotate" registers
359}
360for ($i=4;$i<8;$i++) {
361$code.=<<___;
362 add $TX[0]#b,$YY#b
363 lea 1($XX[0]),$XX[1]
364 movzb ($dat,$YY),$TY#d
365 movzb $XX[1]#b,$XX[1]#d
366 movzb ($dat,$XX[1]),$TX[1]#d
367 movb $TX[0]#b,($dat,$YY)
368 cmp $XX[1],$YY
369 movb $TY#b,($dat,$XX[0])
370 jne .Lcmov$i # Intel cmov is sloooow...
371 mov $TX[0],$TX[1]
372.Lcmov$i:
373 add $TX[0]#b,$TY#b
374 xor ($dat,$TY),%r9b
375 ror \$8,%r9d
376___
377push(@TX,shift(@TX)); push(@XX,shift(@XX)); # "rotate" registers
378}
379$code.=<<___;
380 lea -8($len),$len
381 mov %r8d,($out)
382 lea 8($inp),$inp
383 mov %r9d,4($out)
384 lea 8($out),$out
385
386 test \$-8,$len
387 jnz .Lcloop8
388 cmp \$0,$len
389 jne .Lcloop1
390 jmp .Lexit
391___
392$code.=<<___;
393.align 16
394.Lcloop1:
395 add $TX[0]#b,$YY#b
396 movzb $YY#b,$YY#d
397 movzb ($dat,$YY),$TY#d
398 movb $TX[0]#b,($dat,$YY)
399 movb $TY#b,($dat,$XX[0])
400 add $TX[0]#b,$TY#b
401 add \$1,$XX[0]#b
402 movzb $TY#b,$TY#d
403 movzb $XX[0]#b,$XX[0]#d
404 movzb ($dat,$TY),$TY#d
405 movzb ($dat,$XX[0]),$TX[0]#d
406 xorb ($inp),$TY#b
407 lea 1($inp),$inp
408 movb $TY#b,($out)
409 lea 1($out),$out
410 sub \$1,$len
411 jnz .Lcloop1
412 jmp .Lexit
413
414.align 16
415.Lexit:
416 sub \$1,$XX[0]#b
417 movl $XX[0]#d,-8($dat)
418 movl $YY#d,-4($dat)
419
420 mov (%rsp),%r13
421 mov 8(%rsp),%r12
422 mov 16(%rsp),%rbx
423 add \$24,%rsp
424.Lepilogue:
425 ret
426.size rc4_internal,.-rc4_internal
427___
428}
429
430$idx="%r8";
431$ido="%r9";
432
433$code.=<<___;
434.globl rc4_set_key_internal
435.type rc4_set_key_internal,\@function,3
436.align 16
437rc4_set_key_internal:
438 _CET_ENDBR
439 lea 8($dat),$dat
440 lea ($inp,$len),$inp
441 neg $len
442 mov $len,%rcx
443 xor %eax,%eax
444 xor $ido,$ido
445 xor %r10,%r10
446 xor %r11,%r11
447
448 mov OPENSSL_ia32cap_P(%rip),$idx#d
449 bt \$IA32CAP_BIT0_INTELP4,$idx#d # RC4_CHAR?
450 jc .Lc1stloop
451 jmp .Lw1stloop
452
453.align 16
454.Lw1stloop:
455 mov %eax,($dat,%rax,4)
456 add \$1,%al
457 jnc .Lw1stloop
458
459 xor $ido,$ido
460 xor $idx,$idx
461.align 16
462.Lw2ndloop:
463 mov ($dat,$ido,4),%r10d
464 add ($inp,$len,1),$idx#b
465 add %r10b,$idx#b
466 add \$1,$len
467 mov ($dat,$idx,4),%r11d
468 cmovz %rcx,$len
469 mov %r10d,($dat,$idx,4)
470 mov %r11d,($dat,$ido,4)
471 add \$1,$ido#b
472 jnc .Lw2ndloop
473 jmp .Lexit_key
474
475.align 16
476.Lc1stloop:
477 mov %al,($dat,%rax)
478 add \$1,%al
479 jnc .Lc1stloop
480
481 xor $ido,$ido
482 xor $idx,$idx
483.align 16
484.Lc2ndloop:
485 mov ($dat,$ido),%r10b
486 add ($inp,$len),$idx#b
487 add %r10b,$idx#b
488 add \$1,$len
489 mov ($dat,$idx),%r11b
490 jnz .Lcnowrap
491 mov %rcx,$len
492.Lcnowrap:
493 mov %r10b,($dat,$idx)
494 mov %r11b,($dat,$ido)
495 add \$1,$ido#b
496 jnc .Lc2ndloop
497 movl \$-1,256($dat)
498
499.align 16
500.Lexit_key:
501 xor %eax,%eax
502 mov %eax,-8($dat)
503 mov %eax,-4($dat)
504 ret
505.size rc4_set_key_internal,.-rc4_set_key_internal
506___
507
508sub reg_part {
509my ($reg,$conv)=@_;
510 if ($reg =~ /%r[0-9]+/) { $reg .= $conv; }
511 elsif ($conv eq "b") { $reg =~ s/%[er]([^x]+)x?/%$1l/; }
512 elsif ($conv eq "w") { $reg =~ s/%[er](.+)/%$1/; }
513 elsif ($conv eq "d") { $reg =~ s/%[er](.+)/%e$1/; }
514 return $reg;
515}
516
517$code =~ s/(%[a-z0-9]+)#([bwd])/reg_part($1,$2)/gem;
518$code =~ s/\`([^\`]*)\`/eval $1/gem;
519
520print $code;
521
522close STDOUT;
diff --git a/src/lib/libcrypto/rc4/rc4.c b/src/lib/libcrypto/rc4/rc4.c
deleted file mode 100644
index 56ed43cba7..0000000000
--- a/src/lib/libcrypto/rc4/rc4.c
+++ /dev/null
@@ -1,305 +0,0 @@
1/* $OpenBSD: rc4.c,v 1.13 2025/01/27 14:02:32 jsing Exp $ */
2/* Copyright (C) 1995-1998 Eric Young (eay@cryptsoft.com)
3 * All rights reserved.
4 *
5 * This package is an SSL implementation written
6 * by Eric Young (eay@cryptsoft.com).
7 * The implementation was written so as to conform with Netscapes SSL.
8 *
9 * This library is free for commercial and non-commercial use as long as
10 * the following conditions are aheared to. The following conditions
11 * apply to all code found in this distribution, be it the RC4, RSA,
12 * lhash, DES, etc., code; not just the SSL code. The SSL documentation
13 * included with this distribution is covered by the same copyright terms
14 * except that the holder is Tim Hudson (tjh@cryptsoft.com).
15 *
16 * Copyright remains Eric Young's, and as such any Copyright notices in
17 * the code are not to be removed.
18 * If this package is used in a product, Eric Young should be given attribution
19 * as the author of the parts of the library used.
20 * This can be in the form of a textual message at program startup or
21 * in documentation (online or textual) provided with the package.
22 *
23 * Redistribution and use in source and binary forms, with or without
24 * modification, are permitted provided that the following conditions
25 * are met:
26 * 1. Redistributions of source code must retain the copyright
27 * notice, this list of conditions and the following disclaimer.
28 * 2. Redistributions in binary form must reproduce the above copyright
29 * notice, this list of conditions and the following disclaimer in the
30 * documentation and/or other materials provided with the distribution.
31 * 3. All advertising materials mentioning features or use of this software
32 * must display the following acknowledgement:
33 * "This product includes cryptographic software written by
34 * Eric Young (eay@cryptsoft.com)"
35 * The word 'cryptographic' can be left out if the rouines from the library
36 * being used are not cryptographic related :-).
37 * 4. If you include any Windows specific code (or a derivative thereof) from
38 * the apps directory (application code) you must include an acknowledgement:
39 * "This product includes software written by Tim Hudson (tjh@cryptsoft.com)"
40 *
41 * THIS SOFTWARE IS PROVIDED BY ERIC YOUNG ``AS IS'' AND
42 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
43 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
44 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
45 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
46 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
47 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
48 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
49 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
50 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
51 * SUCH DAMAGE.
52 *
53 * The licence and distribution terms for any publically available version or
54 * derivative of this code cannot be changed. i.e. this code cannot simply be
55 * copied and put under another distribution licence
56 * [including the GNU Public Licence.]
57 */
58
59#include <endian.h>
60
61#include <openssl/rc4.h>
62
63#include "crypto_arch.h"
64
65/* RC4 as implemented from a posting from
66 * Newsgroups: sci.crypt
67 * From: sterndark@netcom.com (David Sterndark)
68 * Subject: RC4 Algorithm revealed.
69 * Message-ID: <sternCvKL4B.Hyy@netcom.com>
70 * Date: Wed, 14 Sep 1994 06:35:31 GMT
71 */
72
73#ifdef HAVE_RC4_INTERNAL
74void rc4_internal(RC4_KEY *key, size_t len, const unsigned char *indata,
75 unsigned char *outdata);
76
77#else
78static void
79rc4_internal(RC4_KEY *key, size_t len, const unsigned char *indata,
80 unsigned char *outdata)
81{
82 RC4_INT *d;
83 RC4_INT x, y,tx, ty;
84 size_t i;
85
86 x = key->x;
87 y = key->y;
88 d = key->data;
89
90#if defined(RC4_CHUNK)
91 /*
92 * The original reason for implementing this(*) was the fact that
93 * pre-21164a Alpha CPUs don't have byte load/store instructions
94 * and e.g. a byte store has to be done with 64-bit load, shift,
95 * and, or and finally 64-bit store. Peaking data and operating
96 * at natural word size made it possible to reduce amount of
97 * instructions as well as to perform early read-ahead without
98 * suffering from RAW (read-after-write) hazard. This resulted
99 * in ~40%(**) performance improvement on 21064 box with gcc.
100 * But it's not only Alpha users who win here:-) Thanks to the
101 * early-n-wide read-ahead this implementation also exhibits
102 * >40% speed-up on SPARC and 20-30% on 64-bit MIPS (depending
103 * on sizeof(RC4_INT)).
104 *
105 * (*) "this" means code which recognizes the case when input
106 * and output pointers appear to be aligned at natural CPU
107 * word boundary
108 * (**) i.e. according to 'apps/openssl speed rc4' benchmark,
109 * crypto/rc4/rc4speed.c exhibits almost 70% speed-up...
110 *
111 * Caveats.
112 *
113 * - RC4_CHUNK="unsigned long long" should be a #1 choice for
114 * UltraSPARC. Unfortunately gcc generates very slow code
115 * (2.5-3 times slower than one generated by Sun's WorkShop
116 * C) and therefore gcc (at least 2.95 and earlier) should
117 * always be told that RC4_CHUNK="unsigned long".
118 *
119 * <appro@fy.chalmers.se>
120 */
121
122# define RC4_STEP ( \
123 x=(x+1) &0xff, \
124 tx=d[x], \
125 y=(tx+y)&0xff, \
126 ty=d[y], \
127 d[y]=tx, \
128 d[x]=ty, \
129 (RC4_CHUNK)d[(tx+ty)&0xff]\
130 )
131
132 if ((((size_t)indata & (sizeof(RC4_CHUNK) - 1)) |
133 ((size_t)outdata & (sizeof(RC4_CHUNK) - 1))) == 0 ) {
134 RC4_CHUNK ichunk, otp;
135
136 /*
137 * I reckon we can afford to implement both endian
138 * cases and to decide which way to take at run-time
139 * because the machine code appears to be very compact
140 * and redundant 1-2KB is perfectly tolerable (i.e.
141 * in case the compiler fails to eliminate it:-). By
142 * suggestion from Terrel Larson <terr@terralogic.net>.
143 *
144 * Special notes.
145 *
146 * - compilers (those I've tried) don't seem to have
147 * problems eliminating either the operators guarded
148 * by "if (sizeof(RC4_CHUNK)==8)" or the condition
149 * expressions themselves so I've got 'em to replace
150 * corresponding #ifdefs from the previous version;
151 * - I chose to let the redundant switch cases when
152 * sizeof(RC4_CHUNK)!=8 be (were also #ifdefed
153 * before);
154 * - in case you wonder "&(sizeof(RC4_CHUNK)*8-1)" in
155 * [LB]ESHFT guards against "shift is out of range"
156 * warnings when sizeof(RC4_CHUNK)!=8
157 *
158 * <appro@fy.chalmers.se>
159 */
160#if BYTE_ORDER == BIG_ENDIAN
161# define BESHFT(c) (((sizeof(RC4_CHUNK)-(c)-1)*8)&(sizeof(RC4_CHUNK)*8-1))
162 for (; len & (0 - sizeof(RC4_CHUNK)); len -= sizeof(RC4_CHUNK)) {
163 ichunk = *(RC4_CHUNK *)indata;
164 otp = RC4_STEP << BESHFT(0);
165 otp |= RC4_STEP << BESHFT(1);
166 otp |= RC4_STEP << BESHFT(2);
167 otp |= RC4_STEP << BESHFT(3);
168 if (sizeof(RC4_CHUNK) == 8) {
169 otp |= RC4_STEP << BESHFT(4);
170 otp |= RC4_STEP << BESHFT(5);
171 otp |= RC4_STEP << BESHFT(6);
172 otp |= RC4_STEP << BESHFT(7);
173 }
174 *(RC4_CHUNK *)outdata = otp^ichunk;
175 indata += sizeof(RC4_CHUNK);
176 outdata += sizeof(RC4_CHUNK);
177 }
178#else
179# define LESHFT(c) (((c)*8)&(sizeof(RC4_CHUNK)*8-1))
180 for (; len & (0 - sizeof(RC4_CHUNK)); len -= sizeof(RC4_CHUNK)) {
181 ichunk = *(RC4_CHUNK *)indata;
182 otp = RC4_STEP;
183 otp |= RC4_STEP << 8;
184 otp |= RC4_STEP << 16;
185 otp |= RC4_STEP << 24;
186 if (sizeof(RC4_CHUNK) == 8) {
187 otp |= RC4_STEP << LESHFT(4);
188 otp |= RC4_STEP << LESHFT(5);
189 otp |= RC4_STEP << LESHFT(6);
190 otp |= RC4_STEP << LESHFT(7);
191 }
192 *(RC4_CHUNK *)outdata = otp ^ ichunk;
193 indata += sizeof(RC4_CHUNK);
194 outdata += sizeof(RC4_CHUNK);
195 }
196#endif
197 }
198#endif
199#define RC4_LOOP(in,out) \
200 x=((x+1)&0xff); \
201 tx=d[x]; \
202 y=(tx+y)&0xff; \
203 d[x]=ty=d[y]; \
204 d[y]=tx; \
205 (out) = d[(tx+ty)&0xff]^ (in);
206
207 i = len >> 3;
208 if (i) {
209 for (;;) {
210 RC4_LOOP(indata[0], outdata[0]);
211 RC4_LOOP(indata[1], outdata[1]);
212 RC4_LOOP(indata[2], outdata[2]);
213 RC4_LOOP(indata[3], outdata[3]);
214 RC4_LOOP(indata[4], outdata[4]);
215 RC4_LOOP(indata[5], outdata[5]);
216 RC4_LOOP(indata[6], outdata[6]);
217 RC4_LOOP(indata[7], outdata[7]);
218
219 indata += 8;
220 outdata += 8;
221
222 if (--i == 0)
223 break;
224 }
225 }
226 i = len&0x07;
227 if (i) {
228 for (;;) {
229 RC4_LOOP(indata[0], outdata[0]);
230 if (--i == 0)
231 break;
232 RC4_LOOP(indata[1], outdata[1]);
233 if (--i == 0)
234 break;
235 RC4_LOOP(indata[2], outdata[2]);
236 if (--i == 0)
237 break;
238 RC4_LOOP(indata[3], outdata[3]);
239 if (--i == 0)
240 break;
241 RC4_LOOP(indata[4], outdata[4]);
242 if (--i == 0)
243 break;
244 RC4_LOOP(indata[5], outdata[5]);
245 if (--i == 0)
246 break;
247 RC4_LOOP(indata[6], outdata[6]);
248 if (--i == 0)
249 break;
250 }
251 }
252 key->x = x;
253 key->y = y;
254}
255#endif
256
257#ifdef HAVE_RC4_SET_KEY_INTERNAL
258void rc4_set_key_internal(RC4_KEY *key, int len, const unsigned char *data);
259
260#else
261static inline void
262rc4_set_key_internal(RC4_KEY *key, int len, const unsigned char *data)
263{
264 RC4_INT tmp;
265 int id1, id2;
266 RC4_INT *d;
267 unsigned int i;
268
269 d = &(key->data[0]);
270 key->x = 0;
271 key->y = 0;
272 id1 = id2 = 0;
273
274#define SK_LOOP(d,n) { \
275 tmp=d[(n)]; \
276 id2 = (data[id1] + tmp + id2) & 0xff; \
277 if (++id1 == len) id1=0; \
278 d[(n)]=d[id2]; \
279 d[id2]=tmp; }
280
281 for (i = 0; i < 256; i++)
282 d[i] = i;
283 for (i = 0; i < 256; i += 4) {
284 SK_LOOP(d, i + 0);
285 SK_LOOP(d, i + 1);
286 SK_LOOP(d, i + 2);
287 SK_LOOP(d, i + 3);
288 }
289}
290#endif
291
292void
293RC4(RC4_KEY *key, size_t len, const unsigned char *indata,
294 unsigned char *outdata)
295{
296 rc4_internal(key, len, indata, outdata);
297}
298LCRYPTO_ALIAS(RC4);
299
300void
301RC4_set_key(RC4_KEY *key, int len, const unsigned char *data)
302{
303 rc4_set_key_internal(key, len, data);
304}
305LCRYPTO_ALIAS(RC4_set_key);
diff --git a/src/lib/libcrypto/rc4/rc4.h b/src/lib/libcrypto/rc4/rc4.h
deleted file mode 100644
index a20472372b..0000000000
--- a/src/lib/libcrypto/rc4/rc4.h
+++ /dev/null
@@ -1,83 +0,0 @@
1/* $OpenBSD: rc4.h,v 1.16 2025/01/25 17:59:44 tb Exp $ */
2/* Copyright (C) 1995-1997 Eric Young (eay@cryptsoft.com)
3 * All rights reserved.
4 *
5 * This package is an SSL implementation written
6 * by Eric Young (eay@cryptsoft.com).
7 * The implementation was written so as to conform with Netscapes SSL.
8 *
9 * This library is free for commercial and non-commercial use as long as
10 * the following conditions are aheared to. The following conditions
11 * apply to all code found in this distribution, be it the RC4, RSA,
12 * lhash, DES, etc., code; not just the SSL code. The SSL documentation
13 * included with this distribution is covered by the same copyright terms
14 * except that the holder is Tim Hudson (tjh@cryptsoft.com).
15 *
16 * Copyright remains Eric Young's, and as such any Copyright notices in
17 * the code are not to be removed.
18 * If this package is used in a product, Eric Young should be given attribution
19 * as the author of the parts of the library used.
20 * This can be in the form of a textual message at program startup or
21 * in documentation (online or textual) provided with the package.
22 *
23 * Redistribution and use in source and binary forms, with or without
24 * modification, are permitted provided that the following conditions
25 * are met:
26 * 1. Redistributions of source code must retain the copyright
27 * notice, this list of conditions and the following disclaimer.
28 * 2. Redistributions in binary form must reproduce the above copyright
29 * notice, this list of conditions and the following disclaimer in the
30 * documentation and/or other materials provided with the distribution.
31 * 3. All advertising materials mentioning features or use of this software
32 * must display the following acknowledgement:
33 * "This product includes cryptographic software written by
34 * Eric Young (eay@cryptsoft.com)"
35 * The word 'cryptographic' can be left out if the rouines from the library
36 * being used are not cryptographic related :-).
37 * 4. If you include any Windows specific code (or a derivative thereof) from
38 * the apps directory (application code) you must include an acknowledgement:
39 * "This product includes software written by Tim Hudson (tjh@cryptsoft.com)"
40 *
41 * THIS SOFTWARE IS PROVIDED BY ERIC YOUNG ``AS IS'' AND
42 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
43 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
44 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
45 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
46 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
47 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
48 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
49 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
50 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
51 * SUCH DAMAGE.
52 *
53 * The licence and distribution terms for any publically available version or
54 * derivative of this code cannot be changed. i.e. this code cannot simply be
55 * copied and put under another distribution licence
56 * [including the GNU Public Licence.]
57 */
58
59#ifndef HEADER_RC4_H
60#define HEADER_RC4_H
61
62#include <openssl/opensslconf.h> /* OPENSSL_NO_RC4, RC4_INT */
63
64#include <stddef.h>
65
66#ifdef __cplusplus
67extern "C" {
68#endif
69
70typedef struct rc4_key_st {
71 RC4_INT x, y;
72 RC4_INT data[256];
73} RC4_KEY;
74
75void RC4_set_key(RC4_KEY *key, int len, const unsigned char *data);
76void RC4(RC4_KEY *key, size_t len, const unsigned char *indata,
77 unsigned char *outdata);
78
79#ifdef __cplusplus
80}
81#endif
82
83#endif
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