Commit message (Expand) | Author | Age | Files | Lines | |
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* | Like ARM, RISC-V does not implement floating point exceptions. | kettenis | 2021-06-17 | 1 | -2/+2 |
* | Skip floating-point exception checks on arm64 and armv7 as the hardware | kettenis | 2020-10-19 | 1 | -1/+3 |
* | Check fpu functions without setjmp/longjmp before testing the latter. | bluhm | 2020-01-16 | 1 | -10/+11 |
* | Split setjmp-fpu regress into separate tests. Use errx(3) to explain | bluhm | 2020-01-13 | 1 | -14/+30 |
* | Make sure we use a sigjmp_buf in the sigsetjmp() part of the test. | miod | 2015-11-08 | 1 | -1/+1 |
* | - Verify that the FPU exception flags weren't clobbered as required by C99. | martynas | 2013-12-29 | 1 | -8/+20 |
* | Add a regression test to verify that the FPU control word state is | martynas | 2013-12-29 | 1 | -0/+34 |