1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
|
/* $OpenBSD: crypto_cpu_caps.c,v 1.3 2024/11/12 13:14:57 jsing Exp $ */
/*
* Copyright (c) 2024 Joel Sing <jsing@openbsd.org>
*
* Permission to use, copy, modify, and distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
#include <stdio.h>
#include <openssl/crypto.h>
#include "x86_arch.h"
/* Legacy architecture specific capabilities, used by perlasm. */
uint64_t OPENSSL_ia32cap_P;
/* Machine independent CPU capabilities. */
extern uint64_t crypto_cpu_caps;
static inline void
cpuid(uint32_t eax, uint32_t *out_eax, uint32_t *out_ebx, uint32_t *out_ecx,
uint32_t *out_edx)
{
uint32_t ebx = 0, ecx = 0, edx = 0;
#ifndef OPENSSL_NO_ASM
__asm__ ("cpuid": "+a"(eax), "+b"(ebx), "+c"(ecx), "+d"(edx));
#else
eax = 0;
#endif
if (out_eax != NULL)
*out_eax = eax;
if (out_ebx != NULL)
*out_ebx = ebx;
if (out_ecx != NULL)
*out_ecx = ecx;
if (out_edx != NULL)
*out_edx = edx;
}
static inline void
xgetbv(uint32_t ecx, uint32_t *out_eax, uint32_t *out_edx)
{
uint32_t eax = 0, edx = 0;
#ifndef OPENSSL_NO_ASM
__asm__ ("xgetbv": "+a"(eax), "+c"(ecx), "+d"(edx));
#endif
if (out_eax != NULL)
*out_eax = eax;
if (out_edx != NULL)
*out_edx = edx;
}
void
crypto_cpu_caps_init(void)
{
uint32_t eax, ebx, ecx, edx;
uint64_t caps = 0;
cpuid(0, &eax, &ebx, &ecx, &edx);
/* "GenuineIntel" in little endian. */
if (ebx == 0x756e6547 && edx == 0x49656e69 && ecx == 0x6c65746e)
caps |= CPUCAP_MASK_INTEL;
if (eax < 1)
return;
cpuid(1, &eax, &ebx, &ecx, &edx);
if ((edx & IA32CAP_MASK0_FXSR) != 0)
caps |= CPUCAP_MASK_FXSR;
if ((edx & IA32CAP_MASK0_HT) != 0)
caps |= CPUCAP_MASK_HT;
if ((edx & IA32CAP_MASK0_MMX) != 0)
caps |= CPUCAP_MASK_MMX;
if ((edx & IA32CAP_MASK0_SSE) != 0)
caps |= CPUCAP_MASK_SSE;
if ((edx & IA32CAP_MASK0_SSE2) != 0)
caps |= CPUCAP_MASK_SSE2;
if ((ecx & IA32CAP_MASK1_AESNI) != 0)
caps |= CPUCAP_MASK_AESNI;
if ((ecx & IA32CAP_MASK1_PCLMUL) != 0)
caps |= CPUCAP_MASK_PCLMUL;
if ((ecx & IA32CAP_MASK1_SSSE3) != 0)
caps |= CPUCAP_MASK_SSSE3;
/* AVX requires OSXSAVE and XMM/YMM state to be enabled. */
if ((ecx & IA32CAP_MASK1_OSXSAVE) != 0) {
xgetbv(0, &eax, NULL);
if (((eax >> 1) & 3) == 3 && (ecx & IA32CAP_MASK1_AVX) != 0)
caps |= CPUCAP_MASK_AVX;
}
/* Set machine independent CPU capabilities. */
if ((caps & CPUCAP_MASK_AESNI) != 0)
crypto_cpu_caps |= CRYPTO_CPU_CAPS_ACCELERATED_AES;
OPENSSL_ia32cap_P = caps;
}
uint64_t
crypto_cpu_caps_ia32(void)
{
return OPENSSL_ia32cap_P;
}
|
