aboutsummaryrefslogtreecommitdiff
diff options
context:
space:
mode:
-rw-r--r--src/Makefile5
-rw-r--r--src/host/buildvm.c2
-rw-r--r--src/host/buildvm_asm.c11
-rw-r--r--src/lj_arch.h36
-rw-r--r--src/lj_asm_ppc.h6
-rw-r--r--src/lj_frame.h2
-rw-r--r--src/lj_target_ppc.h2
-rw-r--r--src/vm_ppc.dasc4
8 files changed, 50 insertions, 18 deletions
diff --git a/src/Makefile b/src/Makefile
index 71ab6ea0..d7539fd5 100644
--- a/src/Makefile
+++ b/src/Makefile
@@ -421,12 +421,15 @@ ifeq (ppc,$(TARGET_LJARCH))
421 ifneq (,$(findstring LJ_ARCH_ROUND 1,$(TARGET_TESTARCH))) 421 ifneq (,$(findstring LJ_ARCH_ROUND 1,$(TARGET_TESTARCH)))
422 DASM_AFLAGS+= -D ROUND 422 DASM_AFLAGS+= -D ROUND
423 endif 423 endif
424 ifneq (,$(findstring LJ_ARCH_PPC64 1,$(TARGET_TESTARCH))) 424 ifneq (,$(findstring LJ_ARCH_PPC32ON64 1,$(TARGET_TESTARCH)))
425 DASM_AFLAGS+= -D GPR64 425 DASM_AFLAGS+= -D GPR64
426 endif 426 endif
427 ifeq (PS3,$(TARGET_SYS)) 427 ifeq (PS3,$(TARGET_SYS))
428 DASM_AFLAGS+= -D PPE -D TOC 428 DASM_AFLAGS+= -D PPE -D TOC
429 endif 429 endif
430 ifneq (,$(findstring LJ_ARCH_PPC64 ,$(TARGET_TESTARCH)))
431 DASM_ARCH= ppc64
432 endif
430endif 433endif
431endif 434endif
432endif 435endif
diff --git a/src/host/buildvm.c b/src/host/buildvm.c
index c3e7dad2..324dd263 100644
--- a/src/host/buildvm.c
+++ b/src/host/buildvm.c
@@ -114,7 +114,7 @@ static const char *sym_decorate(BuildCtx *ctx,
114 else 114 else
115 *p = '\0'; 115 *p = '\0';
116#elif LJ_TARGET_PPC && !LJ_TARGET_CONSOLE 116#elif LJ_TARGET_PPC && !LJ_TARGET_CONSOLE
117 /* Keep @plt. */ 117 /* Keep @plt etc. */
118#else 118#else
119 *p = '\0'; 119 *p = '\0';
120#endif 120#endif
diff --git a/src/host/buildvm_asm.c b/src/host/buildvm_asm.c
index fe1b589a..9b7ae53a 100644
--- a/src/host/buildvm_asm.c
+++ b/src/host/buildvm_asm.c
@@ -140,6 +140,14 @@ static void emit_asm_wordreloc(BuildCtx *ctx, uint8_t *p, int n,
140 fprintf(ctx->fp, "\t%s %d, %d, " TOCPREFIX "%s\n", 140 fprintf(ctx->fp, "\t%s %d, %d, " TOCPREFIX "%s\n",
141 (ins & 1) ? "bcl" : "bc", (ins >> 21) & 31, (ins >> 16) & 31, sym); 141 (ins & 1) ? "bcl" : "bc", (ins >> 21) & 31, (ins >> 16) & 31, sym);
142 } else if ((ins >> 26) == 18) { 142 } else if ((ins >> 26) == 18) {
143#if LJ_ARCH_PPC64
144 const char *suffix = strchr(sym, '@');
145 if (suffix && suffix[1] == 'h') {
146 fprintf(ctx->fp, "\taddis 11, 2, %s\n", sym);
147 } else if (suffix && suffix[1] == 'l') {
148 fprintf(ctx->fp, "\tld 12, %s\n", sym);
149 } else
150#endif
143 fprintf(ctx->fp, "\t%s " TOCPREFIX "%s\n", (ins & 1) ? "bl" : "b", sym); 151 fprintf(ctx->fp, "\t%s " TOCPREFIX "%s\n", (ins & 1) ? "bl" : "b", sym);
144 } else { 152 } else {
145 fprintf(stderr, 153 fprintf(stderr,
@@ -237,6 +245,9 @@ void emit_asm(BuildCtx *ctx)
237 int i, rel; 245 int i, rel;
238 246
239 fprintf(ctx->fp, "\t.file \"buildvm_%s.dasc\"\n", ctx->dasm_arch); 247 fprintf(ctx->fp, "\t.file \"buildvm_%s.dasc\"\n", ctx->dasm_arch);
248#if LJ_ARCH_PPC64
249 fprintf(ctx->fp, "\t.abiversion 2\n");
250#endif
240 fprintf(ctx->fp, "\t.text\n"); 251 fprintf(ctx->fp, "\t.text\n");
241 emit_asm_align(ctx, 4); 252 emit_asm_align(ctx, 4);
242 253
diff --git a/src/lj_arch.h b/src/lj_arch.h
index 54d5cd22..61c7e19f 100644
--- a/src/lj_arch.h
+++ b/src/lj_arch.h
@@ -210,13 +210,24 @@
210 210
211#elif LUAJIT_TARGET == LUAJIT_ARCH_PPC 211#elif LUAJIT_TARGET == LUAJIT_ARCH_PPC
212 212
213#define LJ_ARCH_NAME "ppc" 213#if __BYTE_ORDER__ != __ORDER_BIG_ENDIAN__
214#define LJ_ARCH_ENDIAN LUAJIT_LE
215#else
216#define LJ_ARCH_ENDIAN LUAJIT_BE
217#endif
218
214#if _LP64 219#if _LP64
215#define LJ_ARCH_BITS 64 220#define LJ_ARCH_BITS 64
221#if LJ_ARCH_ENDIAN == LUAJIT_LE
222#define LJ_ARCH_NAME "ppc64le"
223#else
224#define LJ_ARCH_NAME "ppc64"
225#endif
216#else 226#else
217#define LJ_ARCH_BITS 32 227#define LJ_ARCH_BITS 32
228#define LJ_ARCH_NAME "ppc"
218#endif 229#endif
219#define LJ_ARCH_ENDIAN LUAJIT_BE 230
220#define LJ_TARGET_PPC 1 231#define LJ_TARGET_PPC 1
221#define LJ_TARGET_EHRETREG 3 232#define LJ_TARGET_EHRETREG 3
222#define LJ_TARGET_JUMPRANGE 25 /* +-2^25 = +-32MB */ 233#define LJ_TARGET_JUMPRANGE 25 /* +-2^25 = +-32MB */
@@ -225,6 +236,15 @@
225#define LJ_TARGET_UNIFYROT 1 /* Want only IR_BROL. */ 236#define LJ_TARGET_UNIFYROT 1 /* Want only IR_BROL. */
226#define LJ_ARCH_NUMMODE LJ_NUMMODE_DUAL_SINGLE 237#define LJ_ARCH_NUMMODE LJ_NUMMODE_DUAL_SINGLE
227 238
239#if LJ_TARGET_CONSOLE
240#define LJ_ARCH_PPC32ON64 1
241#define LJ_ARCH_NOFFI 1
242#elif LJ_ARCH_BITS == 64
243#define LJ_ARCH_PPC64 1
244#define LJ_TARGET_GC64 1
245#define LJ_ARCH_NOJIT 1 /* NYI */
246#endif
247
228#if _ARCH_PWR7 248#if _ARCH_PWR7
229#define LJ_ARCH_VERSION 70 249#define LJ_ARCH_VERSION 70
230#elif _ARCH_PWR6 250#elif _ARCH_PWR6
@@ -238,10 +258,6 @@
238#else 258#else
239#define LJ_ARCH_VERSION 0 259#define LJ_ARCH_VERSION 0
240#endif 260#endif
241#if __PPC64__ || __powerpc64__ || LJ_TARGET_CONSOLE
242#define LJ_ARCH_PPC64 1
243#define LJ_ARCH_NOFFI 1
244#endif
245#if _ARCH_PPCSQ 261#if _ARCH_PPCSQ
246#define LJ_ARCH_SQRT 1 262#define LJ_ARCH_SQRT 1
247#endif 263#endif
@@ -345,11 +361,11 @@
345#if defined(_SOFT_FLOAT) || defined(_SOFT_DOUBLE) 361#if defined(_SOFT_FLOAT) || defined(_SOFT_DOUBLE)
346#error "No support for PowerPC CPUs without double-precision FPU" 362#error "No support for PowerPC CPUs without double-precision FPU"
347#endif 363#endif
348#if defined(_LITTLE_ENDIAN) 364#if !LJ_ARCH_PPC64 && LJ_ARCH_ENDIAN == LUAJIT_LE
349#error "No support for little-endian PowerPC" 365#error "No support for little-endian PPC32"
350#endif 366#endif
351#if defined(_LP64) 367#if LJ_ARCH_PPC64
352#error "No support for PowerPC 64 bit mode" 368#error "No support for PowerPC 64 bit mode (yet)"
353#endif 369#endif
354#ifdef __NO_FPRS__ 370#ifdef __NO_FPRS__
355#error "No support for PPC/e500 anymore (use LuaJIT 2.0)" 371#error "No support for PPC/e500 anymore (use LuaJIT 2.0)"
diff --git a/src/lj_asm_ppc.h b/src/lj_asm_ppc.h
index 221e221a..7deeb66e 100644
--- a/src/lj_asm_ppc.h
+++ b/src/lj_asm_ppc.h
@@ -323,8 +323,10 @@ static void asm_setupresult(ASMState *as, IRIns *ir, const CCallInfo *ci)
323 } else { 323 } else {
324 ra_destreg(as, ir, RID_FPRET); 324 ra_destreg(as, ir, RID_FPRET);
325 } 325 }
326#if LJ_32
326 } else if (hiop) { 327 } else if (hiop) {
327 ra_destpair(as, ir); 328 ra_destpair(as, ir);
329#endif
328 } else { 330 } else {
329 ra_destreg(as, ir, RID_RET); 331 ra_destreg(as, ir, RID_RET);
330 } 332 }
@@ -343,7 +345,7 @@ static void asm_callx(ASMState *as, IRIns *ir)
343 func = ir->op2; irf = IR(func); 345 func = ir->op2; irf = IR(func);
344 if (irf->o == IR_CARG) { func = irf->op1; irf = IR(func); } 346 if (irf->o == IR_CARG) { func = irf->op1; irf = IR(func); }
345 if (irref_isk(func)) { /* Call to constant address. */ 347 if (irref_isk(func)) { /* Call to constant address. */
346 ci.func = (ASMFunction)(void *)(irf->i); 348 ci.func = (ASMFunction)(void *)(intptr_t)(irf->i);
347 } else { /* Need a non-argument register for indirect calls. */ 349 } else { /* Need a non-argument register for indirect calls. */
348 RegSet allow = RSET_GPR & ~RSET_RANGE(RID_R0, REGARG_LASTGPR+1); 350 RegSet allow = RSET_GPR & ~RSET_RANGE(RID_R0, REGARG_LASTGPR+1);
349 Reg freg = ra_alloc1(as, func, allow); 351 Reg freg = ra_alloc1(as, func, allow);
@@ -527,7 +529,7 @@ static void asm_tvptr(ASMState *as, Reg dest, IRRef ref)
527 /* Otherwise use g->tmptv to hold the TValue. */ 529 /* Otherwise use g->tmptv to hold the TValue. */
528 RegSet allow = rset_exclude(RSET_GPR, dest); 530 RegSet allow = rset_exclude(RSET_GPR, dest);
529 Reg type; 531 Reg type;
530 emit_tai(as, PPCI_ADDI, dest, RID_JGL, offsetof(global_State, tmptv)-32768); 532 emit_tai(as, PPCI_ADDI, dest, RID_JGL, (int32_t)offsetof(global_State, tmptv)-32768);
531 if (!irt_ispri(ir->t)) { 533 if (!irt_ispri(ir->t)) {
532 Reg src = ra_alloc1(as, ref, allow); 534 Reg src = ra_alloc1(as, ref, allow);
533 emit_setgl(as, src, tmptv.gcr); 535 emit_setgl(as, src, tmptv.gcr);
diff --git a/src/lj_frame.h b/src/lj_frame.h
index 8fe48db1..b9595a5a 100644
--- a/src/lj_frame.h
+++ b/src/lj_frame.h
@@ -178,7 +178,7 @@ enum { LJ_CONT_TAILCALL, LJ_CONT_FFI_CALLBACK }; /* Special continuations. */
178#define CFRAME_OFS_MULTRES 408 178#define CFRAME_OFS_MULTRES 408
179#define CFRAME_SIZE 384 179#define CFRAME_SIZE 384
180#define CFRAME_SHIFT_MULTRES 3 180#define CFRAME_SHIFT_MULTRES 3
181#elif LJ_ARCH_PPC64 181#elif LJ_ARCH_PPC32ON64
182#define CFRAME_OFS_ERRF 472 182#define CFRAME_OFS_ERRF 472
183#define CFRAME_OFS_NRES 468 183#define CFRAME_OFS_NRES 468
184#define CFRAME_OFS_PREV 448 184#define CFRAME_OFS_PREV 448
diff --git a/src/lj_target_ppc.h b/src/lj_target_ppc.h
index 2caeeb04..99867688 100644
--- a/src/lj_target_ppc.h
+++ b/src/lj_target_ppc.h
@@ -104,7 +104,7 @@ enum {
104/* This definition must match with the *.dasc file(s). */ 104/* This definition must match with the *.dasc file(s). */
105typedef struct { 105typedef struct {
106 lua_Number fpr[RID_NUM_FPR]; /* Floating-point registers. */ 106 lua_Number fpr[RID_NUM_FPR]; /* Floating-point registers. */
107 int32_t gpr[RID_NUM_GPR]; /* General-purpose registers. */ 107 intptr_t gpr[RID_NUM_GPR]; /* General-purpose registers. */
108 int32_t spill[256]; /* Spill slots. */ 108 int32_t spill[256]; /* Spill slots. */
109} ExitState; 109} ExitState;
110 110
diff --git a/src/vm_ppc.dasc b/src/vm_ppc.dasc
index df60a3be..2a7a7455 100644
--- a/src/vm_ppc.dasc
+++ b/src/vm_ppc.dasc
@@ -1,4 +1,4 @@
1|// Low-level VM code for PowerPC CPUs. 1|// Low-level VM code for PowerPC 32 bit or 32on64 bit mode.
2|// Bytecode interpreter, fast functions and helper functions. 2|// Bytecode interpreter, fast functions and helper functions.
3|// Copyright (C) 2005-2015 Mike Pall. See Copyright Notice in luajit.h 3|// Copyright (C) 2005-2015 Mike Pall. See Copyright Notice in luajit.h
4| 4|
@@ -18,7 +18,7 @@
18|// DynASM defines used by the PPC port: 18|// DynASM defines used by the PPC port:
19|// 19|//
20|// P64 64 bit pointers (only for GPR64 testing). 20|// P64 64 bit pointers (only for GPR64 testing).
21|// Note: a full PPC64 _LP64 port is not planned. 21|// Note: see vm_ppc64.dasc for a full PPC64 _LP64 port.
22|// GPR64 64 bit registers (but possibly 32 bit pointers, e.g. PS3). 22|// GPR64 64 bit registers (but possibly 32 bit pointers, e.g. PS3).
23|// Affects reg saves, stack layout, carry/overflow/dot flags etc. 23|// Affects reg saves, stack layout, carry/overflow/dot flags etc.
24|// FRAME32 Use 32 bit frame layout, even with GPR64 (Xbox 360). 24|// FRAME32 Use 32 bit frame layout, even with GPR64 (Xbox 360).