aboutsummaryrefslogtreecommitdiff
path: root/src/lj_asm.c (follow)
Commit message (Collapse)AuthorAgeFilesLines
* x64: Fix RETHI/RETLO swap after call.Mike Pall2022-04-051-1/+2
| | | | Reported by savilli.
* Revert to trival pow() optimizations to prevent inaccuracies.Mike Pall2022-03-081-2/+1
|
* Fix pow() optimization inconsistencies.Mike Pall2022-01-241-5/+2
|
* Merge branch 'master' into v2.1Mike Pall2022-01-151-1/+1
|\
| * Bump copyright date.Mike Pall2022-01-151-1/+1
| |
* | Fix compiler warning.Mike Pall2021-09-291-2/+2
| | | | | | | | Suggested by Fezile Manana.
* | Compile table traversals: next(), pairs(), BC_ISNEXT/BC_ITERN.Mike Pall2021-09-191-1/+11
| | | | | | | | Sponsored by OpenResty Inc.
* | Use IR_HIOP for generalized two-register returns.Mike Pall2021-09-191-17/+14
| | | | | | | | Sponsored by OpenResty Inc.
* | MIPS: Fix trace linking.Mike Pall2021-09-191-1/+3
| |
* | Minor improvements of optimizations.Mike Pall2021-07-191-1/+11
| |
* | String buffers, part 3c: Add IRBUFHDR_WRITE mode.Mike Pall2021-07-191-0/+8
| | | | | | | | Sponsored by fmad.io.
* | String buffers, part 3b: Change IR_BUFHDR op2 mode bits to mode.Mike Pall2021-07-191-8/+14
| | | | | | | | Sponsored by fmad.io.
* | String buffers, part 3a: Add IR_TMPREF for passing TValues to helpers.Mike Pall2021-07-191-4/+15
| | | | | | | | Sponsored by fmad.io.
* | Fix IR_BUFHDR assembly.Mike Pall2021-06-031-3/+4
| |
* | ARM64: More improvements to the generation of immediates.Mike Pall2021-06-031-0/+3
| |
* | String buffers, part 2d: basic string buffer methods.Mike Pall2021-06-011-0/+1
| | | | | | | | Sponsored by fmad.io.
* | String buffers, part 2a: internal SBuf reorg. Use full pointers.Mike Pall2021-06-011-1/+1
| | | | | | | | Sponsored by fmad.io.
* | Fix IR_RENAME snapshot number. Follow-up fix for a32aeadc.Mike Pall2021-04-201-1/+8
| | | | | | | | Reported by Victor Bombi, analyzed by XmiliaH. Thanks!
* | Merge branch 'master' into v2.1Mike Pall2021-03-231-13/+12
|\|
| * Detect inconsistent renames even in the presence of sunk values.Mike Pall2021-03-231-13/+12
| | | | | | | | Reported by Igor Munkin.
* | Handle on-trace OOM errors from helper functions.Mike Pall2021-03-231-17/+54
| |
* | Merge branch 'master' into v2.1Mike Pall2021-01-021-1/+1
|\|
| * Bump copyright date.Mike Pall2021-01-021-1/+1
| |
* | Merge branch 'master' into v2.1Mike Pall2020-10-121-1/+1
|\|
| * Ensure full init of IR_NOP instructions.Mike Pall2020-10-121-1/+1
| |
* | Redesign and harden string interning.Mike Pall2020-06-231-1/+1
| | | | | | | | | | Up to 40% faster on hash-intensive benchmarks. With some ideas from Sokolov Yura.
* | Improve assertions.Mike Pall2020-06-151-42/+80
| |
* | Optimize table length computation with hinting.Mike Pall2020-05-271-0/+7
| | | | | | | | 10x faster on loop with t[#t+1] = x idiom. Also used by table.insert.
* | Remove pow() splitting and cleanup backends.Mike Pall2020-05-231-38/+68
| |
* | Cleanup math function compilation and fix inconsistencies.Mike Pall2020-05-221-7/+1
| |
* | Merge branch 'master' into v2.1Mike Pall2020-01-201-1/+1
|\|
| * Bump copyright date.Mike Pall2020-01-201-1/+1
| |
* | MIPS: Add MIPS64 R6 port.Mike Pall2020-01-201-1/+1
| | | | | | | | | | | | Contributed by Hua Zhang, YunQiang Su from Wave Computing, and Radovan Birdic from RT-RK. Sponsored by Wave Computing.
* | Merge branch 'master' into v2.1Mike Pall2019-12-081-1/+0
|\|
| * Typo.Mike Pall2019-12-081-1/+0
| |
* | Merge branch 'master' into v2.1Mike Pall2019-04-291-1/+1
|\|
| * ARM: Fix GCC 7 -Wimplicit-fallthrough warnings.Mike Pall2019-04-291-1/+1
| |
* | Merge branch 'master' into v2.1Mike Pall2018-01-291-1/+6
|\|
| * Fix GCC 7 -Wimplicit-fallthrough warnings.Mike Pall2018-01-291-1/+2
| |
* | Fix IR_BUFPUT assembly.Mike Pall2018-01-141-3/+3
| | | | | | | | Thanks to Peter Cawley.
* | LJ_GC64: Make ASMREF_L references 64 bit.Mike Pall2017-10-021-0/+1
| | | | | | | | Reported by Yichun Zhang.
* | LJ_GC64: Fix ir_khash for non-string GCobj.Mike Pall2017-10-021-0/+4
| | | | | | | | Contributed by Peter Cawley.
* | MIPS64: Add soft-float support to JIT compiler backend.Mike Pall2017-06-071-4/+4
| | | | | | | | | | Contributed by Djordje Kovacevic and Stefan Pejic from RT-RK.com. Sponsored by Cisco Systems, Inc.
* | ARM64: Add big-endian support.Mike Pall2017-03-301-0/+3
| | | | | | | | | | Contributed by Djordje Kovacevic and Stefan Pejic from RT-RK.com. Sponsored by Cisco Systems, Inc.
* | Merge branch 'master' into v2.1Mike Pall2017-01-171-1/+1
|\|
| * Bump copyright date to 2017.Mike Pall2017-01-171-1/+1
| |
* | Generalize deferred constant handling in backend to 64 bit.Mike Pall2016-11-211-4/+30
| |
* | ARM64: Add JIT compiler backend.Mike Pall2016-11-201-0/+4
| | | | | | | | | | Contributed by Djordje Kovacevic and Stefan Pejic from RT-RK.com. Sponsored by Cisco Systems, Inc.
* | Properly clean up state before restart of trace assembly.Mike Pall2016-06-271-6/+10
| |
* | x64/LJ_GC64: Add missing backend support and enable JIT compilation.Mike Pall2016-05-231-0/+11
| | | | | | | | Contributed by Peter Cawley.