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| author | jsing <> | 2025-06-09 14:28:34 +0000 |
|---|---|---|
| committer | jsing <> | 2025-06-09 14:28:34 +0000 |
| commit | 951cd4503ff3c4cc93c1a36cf06138b1ddd739d7 (patch) | |
| tree | 6c411eca3de0b4b777e48c9aba4d6dd13c8e899a /src/lib/libcrypto/modes | |
| parent | d8ae322f91ae730f31b750787e0180588dab36dc (diff) | |
| download | openbsd-951cd4503ff3c4cc93c1a36cf06138b1ddd739d7.tar.gz openbsd-951cd4503ff3c4cc93c1a36cf06138b1ddd739d7.tar.bz2 openbsd-951cd4503ff3c4cc93c1a36cf06138b1ddd739d7.zip | |
Make OPENSSL_IA32_SSE2 the default for i386 and remove the flag.
The OPENSSL_IA32_SSE2 flag controls whether a number of the perlasm
scripts generate additional implementations that use SSE2 functionality.
In all cases except ghash, the code checks OPENSSL_ia32cap_P for SSE2
support, before trying to run SSE2 code. For ghash it generates a CLMUL
based implementation in addition to different MMX version (one MMX
version hides behind OPENSSL_IA32_SSE2, the other does not), however this
does not appear to actually use SSE2. We also disable AES-NI on i386 if
OPENSSL_IA32_SSE2.
On OpenBSD, we've always defined OPENSSL_IA32_SSE2 so this is effectively
a no-op. The only change is that we now check MMX rather than SSE2 for the
ghash MMX implementation.
ok bcook@ beck@
Diffstat (limited to 'src/lib/libcrypto/modes')
| -rw-r--r-- | src/lib/libcrypto/modes/asm/ghash-x86.pl | 3 | ||||
| -rw-r--r-- | src/lib/libcrypto/modes/gcm128.c | 8 |
2 files changed, 2 insertions, 9 deletions
diff --git a/src/lib/libcrypto/modes/asm/ghash-x86.pl b/src/lib/libcrypto/modes/asm/ghash-x86.pl index 47833582b6..395c680cc5 100644 --- a/src/lib/libcrypto/modes/asm/ghash-x86.pl +++ b/src/lib/libcrypto/modes/asm/ghash-x86.pl | |||
| @@ -119,8 +119,7 @@ require "x86asm.pl"; | |||
| 119 | 119 | ||
| 120 | &asm_init($ARGV[0],"ghash-x86.pl",$x86only = $ARGV[$#ARGV] eq "386"); | 120 | &asm_init($ARGV[0],"ghash-x86.pl",$x86only = $ARGV[$#ARGV] eq "386"); |
| 121 | 121 | ||
| 122 | $sse2=0; | 122 | $sse2=1; |
| 123 | for (@ARGV) { $sse2=1 if (/-DOPENSSL_IA32_SSE2/); } | ||
| 124 | 123 | ||
| 125 | ($Zhh,$Zhl,$Zlh,$Zll) = ("ebp","edx","ecx","ebx"); | 124 | ($Zhh,$Zhl,$Zlh,$Zll) = ("ebp","edx","ecx","ebx"); |
| 126 | $inp = "edi"; | 125 | $inp = "edi"; |
diff --git a/src/lib/libcrypto/modes/gcm128.c b/src/lib/libcrypto/modes/gcm128.c index 2540b7cf3d..8136c2cde2 100644 --- a/src/lib/libcrypto/modes/gcm128.c +++ b/src/lib/libcrypto/modes/gcm128.c | |||
| @@ -1,4 +1,4 @@ | |||
| 1 | /* $OpenBSD: gcm128.c,v 1.50 2025/06/08 07:49:45 jsing Exp $ */ | 1 | /* $OpenBSD: gcm128.c,v 1.51 2025/06/09 14:28:34 jsing Exp $ */ |
| 2 | /* ==================================================================== | 2 | /* ==================================================================== |
| 3 | * Copyright (c) 2010 The OpenSSL Project. All rights reserved. | 3 | * Copyright (c) 2010 The OpenSSL Project. All rights reserved. |
| 4 | * | 4 | * |
| @@ -259,7 +259,6 @@ CRYPTO_gcm128_init(GCM128_CONTEXT *ctx, void *key, block128_f block) | |||
| 259 | ctx->H.u[1] = be64toh(ctx->H.u[1]); | 259 | ctx->H.u[1] = be64toh(ctx->H.u[1]); |
| 260 | 260 | ||
| 261 | # if defined(GHASH_ASM_X86_OR_64) | 261 | # if defined(GHASH_ASM_X86_OR_64) |
| 262 | # if !defined(GHASH_ASM_X86) || defined(OPENSSL_IA32_SSE2) | ||
| 263 | /* check FXSR and PCLMULQDQ bits */ | 262 | /* check FXSR and PCLMULQDQ bits */ |
| 264 | if ((crypto_cpu_caps_ia32() & (CPUCAP_MASK_FXSR | CPUCAP_MASK_PCLMUL)) == | 263 | if ((crypto_cpu_caps_ia32() & (CPUCAP_MASK_FXSR | CPUCAP_MASK_PCLMUL)) == |
| 265 | (CPUCAP_MASK_FXSR | CPUCAP_MASK_PCLMUL)) { | 264 | (CPUCAP_MASK_FXSR | CPUCAP_MASK_PCLMUL)) { |
| @@ -268,14 +267,9 @@ CRYPTO_gcm128_init(GCM128_CONTEXT *ctx, void *key, block128_f block) | |||
| 268 | ctx->ghash = gcm_ghash_clmul; | 267 | ctx->ghash = gcm_ghash_clmul; |
| 269 | return; | 268 | return; |
| 270 | } | 269 | } |
| 271 | # endif | ||
| 272 | gcm_init_4bit(ctx->Htable, ctx->H.u); | 270 | gcm_init_4bit(ctx->Htable, ctx->H.u); |
| 273 | # if defined(GHASH_ASM_X86) /* x86 only */ | 271 | # if defined(GHASH_ASM_X86) /* x86 only */ |
| 274 | # if defined(OPENSSL_IA32_SSE2) | ||
| 275 | if (crypto_cpu_caps_ia32() & CPUCAP_MASK_SSE) { /* check SSE bit */ | ||
| 276 | # else | ||
| 277 | if (crypto_cpu_caps_ia32() & CPUCAP_MASK_MMX) { /* check MMX bit */ | 272 | if (crypto_cpu_caps_ia32() & CPUCAP_MASK_MMX) { /* check MMX bit */ |
| 278 | # endif | ||
| 279 | ctx->gmult = gcm_gmult_4bit_mmx; | 273 | ctx->gmult = gcm_gmult_4bit_mmx; |
| 280 | ctx->ghash = gcm_ghash_4bit_mmx; | 274 | ctx->ghash = gcm_ghash_4bit_mmx; |
| 281 | } else { | 275 | } else { |
