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authorMike Pall <mike>2016-11-19 19:53:46 +0100
committerMike Pall <mike>2016-11-19 19:53:46 +0100
commite577db52c543303543c9e30e8ebe0c244e1b85c8 (patch)
tree745f5c5e39aa83f66f2ceb3e3145f44f551a197c /src/lj_asm_mips.h
parent5400c1e42469cdb3cb5df691baa877b762b27704 (diff)
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Increase range of GG_State loads via IR_FLOAD with REF_NIL.
Require 32 bit alignment and store offset/4 instead. Otherwise this can overflow the 10 bit limit for the FOLD op2 key.
Diffstat (limited to 'src/lj_asm_mips.h')
-rw-r--r--src/lj_asm_mips.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/lj_asm_mips.h b/src/lj_asm_mips.h
index cf446346..0ae5e287 100644
--- a/src/lj_asm_mips.h
+++ b/src/lj_asm_mips.h
@@ -901,7 +901,7 @@ static void asm_fload(ASMState *as, IRIns *ir)
901 int32_t ofs; 901 int32_t ofs;
902 if (ir->op1 == REF_NIL) { 902 if (ir->op1 == REF_NIL) {
903 idx = RID_JGL; 903 idx = RID_JGL;
904 ofs = ir->op2 - 32768; 904 ofs = (ir->op2 << 2) - 32768;
905 } else { 905 } else {
906 idx = ra_alloc1(as, ir->op1, RSET_GPR); 906 idx = ra_alloc1(as, ir->op1, RSET_GPR);
907 if (ir->op2 == IRFL_TAB_ARRAY) { 907 if (ir->op2 == IRFL_TAB_ARRAY) {